Circuit Model Fault Injection via Interrupter and Inserter
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Solution Overview
Problem
Current verification and validation methods for complex analogue and digital systems, especially in the automotive industry, inadequately address the consideration of failure aspects and modeling of failure behavior, despite the need to ensure functional correctness, robustness, and safety compliance with standards like ISO 26262.
Innovation Solution
An apparatus and method for testing circuits using a circuit model that interrupts connections between components, inserts a test element model to simulate faulty behavior, and evaluates responses without modifying the original circuit model, employing SystemC or SystemC AMS to dynamically inject failure structures into the simulation, allowing for the evaluation of faulty behavior without altering the nominal design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a circuit model includes descriptions of faulty components and faulty signals to test failure behavior, then the ability to evaluate system robustness and safety is improved, but the complexity of the circuit model increases and the original nominal design description is altered
Solution Approach 1:
The circuit model is segmented into two separate parts: the original nominal circuit model without fault descriptions, and separate test element models that describe faulty components and signals. This segmentation allows the nominal design to remain unchanged while enabling comprehensive failure behavior testing through the addition of independent test elements.
Solution Approach 2:
Test element models serve as intermediaries between the original nominal circuit model and the failure behavior to be tested. These test elements are inserted into the circuit model to introduce fault conditions without modifying the original circuit description, thereby enabling safety and robustness evaluation while preserving the integrity of the nominal design.
2Adaptability or versatility
If the original circuit model is modified to include fault descriptions for testing, then failure behavior can be simulated, but the original nominal design description is altered and may affect verification accuracy
Solution Approach 1:
Instead of modifying the original circuit model directly, the approach creates a copy or instance of the circuit model and inserts test element models into this copy. The original nominal circuit model remains unchanged and unmodified, ensuring that verification accuracy is maintained while the copied model can be used for failure behavior simulation.
Solution Approach 2:
Test element models act as intermediaries that are inserted into the circuit model to introduce fault conditions. These test elements are added without removing or altering the original circuit descriptions, allowing simultaneous preservation of nominal design accuracy and ability to simulate failures.
3Reliability
If verification tools are designed to handle both nominal behavior and failure aspects, then comprehensive system validation is improved, but the complexity of verification tools and methods increases
Solution Approach 1:
The verification tool is designed with universal functionality to handle both nominal behavior verification and failure behavior testing through a unified interface. The tool can process circuit models with or without test element models inserted, providing comprehensive validation capabilities while maintaining a consistent and manageable tool architecture rather than requiring separate specialized tools.
Data Source
AI summary
The invention refers to an apparatus for testing a circuit, including: an interrupter configured for interrupting based on a circuit model describing at least a part of the circuit a connection between two components of the circuit, wherein the circuit model describes the two components connected by the connection, an inserter configured for inserting based on the circuit model a test element model into the interrupted connection, and an evaluator configured for evaluating based on the circuit model and the test element model a response of the circuit model to the inserted test element model. The invention also refers to a corresponding method.