Circuit Design Floorplan Inference Points and Congestion Feedback
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Solution Overview
Problem
Current floorplanning tools in electronic design automation (EDA) lack user-friendly interfaces for precise object positioning and congestion analysis, leading to increased design time and reduced productivity due to reliance on fixed grids and inefficient alignment tools.
Innovation Solution
A graphical user interface (GUI) that utilizes dynamic inference points and congestion indicators to facilitate precise object placement and instantaneous feedback on congestion, allowing users to select offset points from inferred reference points and update pin locations without performing global routing, thereby streamlining the design process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If fixed grids and traditional alignment tools are used for object placement, then the interface is simpler to implement, but the precision and ease of positioning objects are reduced
Solution Approach 1:
The interface is segmented into multiple functional layers: inference point selection, dynamic inference point generation, offset specification, and operation execution. This allows complex positioning functionality to be broken down into manageable, user-friendly steps without overwhelming the user.
Solution Approach 2:
Dynamic inference points act as intermediaries between the user's intent and the actual object placement. These inferred points are automatically generated based on selected objects and serve as precise reference points, eliminating the need for users to manually calculate or estimate positions.
2Measurement precision
If full congestion analysis (global routing) is performed after every layout modification, then the most accurate congestion information is provided, but the design time and computational resources are significantly increased
Solution Approach 1:
Instead of performing complete global routing analysis for every modification, the system performs partial congestion analysis only on affected regions or channels. This provides sufficient accuracy for decision-making while dramatically reducing computational time and resources.
Solution Approach 2:
The system performs preliminary congestion analysis during the floorplanning stage and maintains congestion indicators as the layout evolves. This preliminary information is updated incrementally rather than recalculating from scratch, providing timely feedback without full re-analysis.
3Ease of operation
If manual positioning methods are used, then the interface is easier to implement, but the ease of operation and productivity are reduced
Solution Approach 1:
The system performs automatic inference point generation and offset calculations based on user selections. The software serves itself by automatically determining precise positioning points and computing offsets, eliminating manual calculation and positioning efforts while improving productivity.
4Manufacturing precision
If precise offset control is implemented, then the manufacturing precision of object placement is improved, but the device complexity increases
Solution Approach 1:
The offset specification is made dynamic and context-aware. The system automatically adjusts offset calculations based on the selected objects, inference points, and current layout state. This dynamic adaptation provides precise control without requiring users to understand complex offset mathematics.
Data Source
AI summary
Methods and apparatuses are described for creating, editing, and viewing a floorplan of a circuit design. Specifically, some embodiments enable a user to perform a graphical operation at an inference point in a circuit design layout, wherein the location of the inference point is determined based on existing graphical objects in the circuit design layout. Some embodiments substantially instantaneously update a congestion indicator in a circuit design layout in response to modifying the circuit design layout. Some embodiments substantially instantaneously update pin locations of a block or partition in response to changing the size or shape of the block or partition. Some embodiments enable a user to view a circuit design layout based on the logical hierarchy, and also based on at least one additional attribute type such as voltage, power, or clock domain.