Circuit Information Integrity Verification via CPU Signature Replacement
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Solution Overview
Problem
Conventional systems fail to effectively verify the integrity of circuit information exchanged between a CPU's protection area and an FPGA, leading to potential tampering and increased processing load on the FPGA due to signature verification processes.
Innovation Solution
An integrity verification system that includes a CPU with a protection area equipped with a signature verification unit and a signature replacement unit, which verifies and replaces signatures before transmitting circuit information to an FPGA, and the FPGA adds hash values to output values for verification by the CPU.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the FPGA performs signature verification of circuit information, then the integrity of circuit information can be verified, but the processing load on the FPGA increases
Solution Approach 1:
The patent introduces a CPU as an intermediary between the development PC and the FPGA. The CPU performs the signature verification of circuit information instead of the FPGA, thereby protecting the integrity of circuit information while avoiding the increased processing load on the FPGA. The CPU acts as a mediator that handles the complex verification tasks, allowing the FPGA to focus on its primary computational functions.
2Reliability
If the FPGA manages multiple public keys for verification, then the integrity of multiple information sources can be verified, but the device complexity increases
Solution Approach 1:
The patent extracts the public key management and signature verification functionality from the FPGA and relocates it to the CPU. This separation allows the FPGA to avoid the complexity of managing multiple public keys and performing verification operations. The CPU, which is better suited for such cryptographic operations, handles the key management, thereby reducing the FPGA's device complexity while maintaining verification capabilities.
3Reliability
If the CPU verifies signatures before transmission, then the integrity can be confirmed, but the communication time increases
Solution Approach 1:
The patent implements preliminary signature verification by the CPU before transmitting circuit information to the FPGA. This preliminary action ensures that only authenticated and intact circuit information is transmitted, confirming integrity before the communication process begins. Although this adds some verification time, it prevents potential security issues and rework, ultimately improving the overall efficiency and reliability of the system.
Data Source
AI summary
In an integrity verification system (1) for circuit information, a CPU (100) includes, in a protection area (130), a signature verification unit (132) that verifies a signature of circuit information (11) signed by a development PC (10) and transmitted to a concerned CPU (100), and a signature replacement unit (135) that replaces a signature verified by the signature verification unit (132) with a signature using a key of a concerned CPU (100) before the circuit information (11) is transmitted to an FPGA (200), and the FPGA (200), in a case where an input value (12) is transmitted from the CPU (100), performs calculation on the basis of the input value (12), adds hash values of the input value (12) and the circuit information (11) and a signature to an output value of the calculation, and transmits the output value to the CPU (100).