Circuit Interrupter Supervisory Function for Fault Detection

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Solution Overview

Problem

Circuit interrupters, such as arc fault circuit interrupters (AFCIs), face challenges in maintaining consistent protection due to intermittent hardware errors, which can lead to 'nuisance trips' where the device incorrectly identifies normal loads as faults or fails to detect actual faults due to impaired circuitry, resulting in suboptimal protection.

Innovation Solution

A supervisory function is implemented in the trip circuit that monitors repetitive test functions and error conditions, setting a timer and accumulator to determine if the protective functions' availability falls below a threshold, triggering the trip mechanism only when necessary, thereby preventing false trips and ensuring adequate protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If repetitive test functions continuously monitor hardware circuits, then detection capability is improved, but false trips increase due to intermittent error conditions

Engineering Contradiction:
Improvedetection capabilityVSAvoidfalse trips
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The supervisory function performs preliminary assessment of error conditions by counting them over a predetermined time period before triggering a trip. This preliminary action distinguishes between transient errors that should be tolerated and persistent errors that indicate genuine faults, thereby reducing false trips while maintaining detection capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The supervisory function continuously monitors error conditions from repetitive test functions and uses this feedback to make intelligent decisions about tripping. By implementing a counting mechanism that accumulates error occurrences over time, the system adapts its response based on the frequency and persistence of errors, balancing detection sensitivity with operational reliability.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If continuous monitoring is implemented, then fault detection is improved, but device complexity increases

Engineering Contradiction:
Improvefault detectionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The supervisory function is designed to be multi-functional, serving both to monitor error conditions from repetitive tests and to make trip decisions. By consolidating these functions into a single supervisory mechanism that counts errors and determines tripping, the patent reduces overall complexity compared to having separate dedicated circuits for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2932570B1Circuit interrupter including supervisory function for protective function and hardware circuit repetitive test function
Publication Date: 2023.02.15 EATON INTELLIGENT POWER LTD
  • EP2932570B1 patent drawingFigure 1
  • EP2932570B1 patent drawingFigure 2
  • EP2932570B1 patent drawingFigure 3A

AI summary

A circuit interrupter (2) for a power circuit (4) includes separable contacts (10), an operating mechanism (12) structured to open and close the separable contacts, and a trip circuit (14) cooperating with the operating mechanism to trip open the separable contacts. The trip circuit includes a number of hardware circuits (16,18,20,22,24,26,28,30,32,34) having a processor (34) with a number of routines (38,40,42). The routines provide a number of protective functions (38) structured (40) to detect a number of faults of the power circuit, a number of repetitive test functions for the number of hardware circuits, and a supervisory function (42) cooperating with the number of repetitive test functions. The supervisory function is structured to prevent availability of protection by the number of protective functions from falling below a predetermined threshold as a result of a plurality of intermittent error conditions of the number of hardware circuits.