Proprietary Circuit Layout Identification via Physical Feature Patterns

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Solution Overview

Problem

Existing methods for tracking the usage of proprietary circuit layouts are ineffective due to the potential removal of embedded tagging data or watermarks, making it difficult for circuit designers to gather royalty payments.

Innovation Solution

A method that generates a characteristic pattern file based on the relative locations of predetermined physical features within the circuit layout, allowing for identification without the need for additional tagging or watermarking, utilizing a layout database file to extract and compare these features.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If tagging data or watermarks are embedded in proprietary circuit layouts to enable identification, then identification capability is improved, but the tagging data can be removed either accidentally or intentionally, causing loss of identification ability

Engineering Contradiction:
Improveidentification capabilityVSAvoidtagging data removal
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent extracts identification capability from removable tagging data and relocates it to inherent physical features of the circuit layout that cannot be removed. By analyzing and comparing physical characteristics such as transistor arrangements, interconnect patterns, and device geometries, the system creates identification based on the circuit's fundamental structure rather than附加信息.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of adding external identification markers to the circuit, the patent inverts the approach by using the circuit's own physical features as the identification basis. The inherent layout characteristics that define the circuit's functionality are repurposed as identification markers, eliminating the need for separate tagging systems.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If tagging data is embedded to identify proprietary circuit layouts, then identification is enabled, but the complexity of modern circuit designs makes tracking usage difficult

Engineering Contradiction:
Improveidentification capabilityVSAvoidcircuit design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates simplified representations or models of the physical features from complex circuit layouts. By extracting and comparing key geometric and topological characteristics rather than analyzing entire complex designs, the system enables efficient identification without being overwhelmed by design complexity.

Inventive Principle:
Principle #26Copying

3Reliability

If additional tagging information is added to circuit layouts for identification, then identification capability is improved, but modification of the circuit layout is required

Engineering Contradiction:
Improveidentification capabilityVSAvoidlayout modification requirement
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The circuit layout's physical features serve their dual purpose: defining circuit functionality and providing identification capability. The same transistors, interconnects, and devices that make the circuit work also serve as the identification markers, eliminating the need for separate tagging elements and avoiding additional manufacturing steps.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8881078B2Proprietary circuit layout identification
Publication Date: 2014.11.04 ARM LTD
  • US8881078B2 patent drawing
  • US8881078B2 patent drawing
  • US8881078B2 patent drawing

AI summary

A method is provided for identifying use of a proprietary circuit layout. A representation of a layout of a circuit is input and the locations of a set of predetermined physical features of the circuit are identified. This set of locations is then compared with a previously generated characteristic pattern file, the characteristic pattern file comprising a representation of relative locations of a set of these predetermined physical features in the proprietary circuit layout. If the set of locations matches the relative locations of the characteristic pattern file, then an output is generated indicating that use of the proprietary circuit design has been found.