Circuit Layout Portion Legalization for Analog RF Designs

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Solution Overview

Problem

The complexity of modern IC manufacturing design rules complicates the creation of design rule clean layouts, especially for analog and RF circuit designs, which often require tedious manual edits due to the lack of standard building blocks and extended placement and routing tools.

Innovation Solution

A system that automatically modifies a user-selected portion of a circuit layout to satisfy technology and design constraints, preserving connectivity and user-specified spatial relationships, while identifying a maximal set of satisfiable technology constraints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If manual layout editing is used to satisfy design rules, then design rule compliance can be achieved, but the process becomes tedious and time-consuming

Engineering Contradiction:
Improvedesign rule complianceVSAvoidlayout editing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The layout editor automatically detects design rule violations and performs corrections without requiring manual intervention. The system self-services by identifying violations, generating correction options, and applying fixes automatically, thereby eliminating the tedious manual editing process while maintaining design rule compliance

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system continuously monitors the layout for design rule violations and provides real-time feedback to the user. When violations are detected, the system generates correction suggestions and allows iterative refinement, enabling rapid convergence to a compliant design without time-consuming manual checking

Inventive Principle:
Principle #23Feedback

2Adaptability or versatility

If standard cell layouts and extended placement routing tools are used, then digital circuit design rule compliance is achievable, but the approach does not work for analog and RF circuit designs

Engineering Contradiction:
Improveapplicability to different circuit typesVSAvoidlayout creation ease
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The layout editor is designed as a universal tool that can handle digital, analog, and RF circuit designs with a single unified interface. It provides design rule checking and correction capabilities that adapt to different circuit types, eliminating the need for separate tools or approaches for different design domains

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system allows dynamic adjustment of design rules and constraints based on the specific circuit type being designed. For analog and RF circuits, the editor can modify rule sets and validation parameters to match the specific requirements of each circuit category, making the tool equally effective across diverse design domains

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If multiple iterations between circuit sizing and layout creation are performed, then design optimization is achieved, but the complexity of maintaining design rule compliance increases

Engineering Contradiction:
Improvedesign rule complianceVSAvoidlayout complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The layout editor maintains continuous design rule checking and validation throughout the iterative design process. Rather than requiring separate validation steps between iterations, the system continuously monitors compliance, allowing designers to iterate on circuit sizing and layout without accumulating complexity in maintaining rule adherence

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9043741B2Legalizing a portion of a circuit layout
Publication Date: 2015.05.26 SYNOPSYS INC
  • US9043741B2 patent drawing
  • US9043741B2 patent drawing
  • US9043741B2 patent drawing

AI summary

A layout-legalizing system modifies a portion of a circuit layout that is selected by a user to generate a modified portion that satisfies a set of technology constraints and a set of design constraints. The system receives as input the set of technology constraints which a semiconductor manufacturing foundry requires the circuit layout to satisfy for manufacturability purposes. The system also receives a set of design constraints from the user which restricts how objects in the portion of the circuit layout can be modified to satisfy the set of technology constraints. The system can further receive a selection input from the user which identifies the portion of the circuit layout which is to be legalized. The system then modifies the identified portion of the circuit layout to obtain a modified portion which satisfies the set of design constraints and at least a subset of the set of technology constraints.