Automatic Circuit Layout Simplification for EM Simulation
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Solution Overview
Problem
Current circuit simulators, particularly for electromagnetic simulations, face significant challenges with increasing complexity, requiring excessive computational resources and time, forcing designers to simplify their designs for efficient simulation, which can compromise accuracy.
Innovation Solution
A system and method that automatically modifies a circuit layout by simplifying it using specific rules for electromagnetic simulation, such as removing unnecessary features and repositioning ports, to generate a second layout that enables efficient and accurate simulation, with the option to customize rules based on fabrication processes or user input.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the circuit layout complexity is increased to improve design accuracy, then the design fidelity is improved, but the simulation time and computational resources required increase significantly
Solution Approach 1:
The patent segments the circuit layout into different regions or components that can be simulated independently or in a hierarchical manner. This allows the complex layout to be broken down into manageable parts, reducing the overall simulation time while maintaining design fidelity through systematic analysis of individual segments.
Solution Approach 2:
The patent extracts and removes unnecessary or redundant features from the circuit layout before simulation. By identifying and eliminating non-critical elements that do not contribute to the essential electromagnetic behavior, the simulation complexity is reduced while preserving the key design characteristics needed for accurate verification.
2Productivity
If the circuit layout is simplified to reduce simulation complexity, then the simulation efficiency is improved, but the design accuracy may be compromised
Solution Approach 1:
The patent applies local quality by differentiating between critical and non-critical regions of the circuit layout. Essential features that impact electromagnetic performance are retained with high fidelity, while non-essential features are simplified or removed. This selective approach maintains design accuracy in critical areas while improving overall simulation efficiency.
Solution Approach 2:
The patent modifies simulation parameters and layout features based on their impact on electromagnetic behavior. By changing parameters such as feature dimensions, material properties, or geometric details in a controlled manner, the simulation model is optimized to achieve the necessary accuracy level without requiring full complexity of the original design.
3Loss of time
If the circuit layout is modified automatically to improve simulation speed, then the simulation time is reduced, but the manual verification effort increases
Solution Approach 1:
The patent implements feedback mechanisms that automatically compare the modified layout with the original design, identify changes, and provide verification reports. This feedback system helps designers quickly assess the impact of automatic modifications, reducing the manual verification effort while maintaining confidence in the simulation results.
Solution Approach 2:
The patent employs self-service features where the simulation tool automatically performs layout modifications, validates the changes, and generates verification documentation without requiring extensive manual intervention. The system serves itself by autonomously managing the modification and verification process, minimizing the burden on designers.
Data Source
AI summary
Automatically modifying a layout to perform circuit simulation. Initially, a first layout of the electronic system may be received or stored. A second layout of the electronic system may be automatically generated based on the first layout. The automatic generation may involve automatically simplifying the first layout using a set of rules for electromagnetic (EM) simulation. The second layout may then be used to perform EM simulation of the electronic system, e.g., to perform verification.


