Circuit Partitioning With Primary Signals for Parallel Simulation
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Solution Overview
Problem
Circuit designs of increasing complexity and size face challenges in simulation due to high computational demands, with neither pure simulation nor pure emulation being suitable, leading to inefficiencies in resource usage and performance.
Innovation Solution
A method involving partitioning circuit designs into uniform-sized segments, identifying sequential dependencies, and designating a set of primary signals to break these dependencies, allowing independent simulation of each segment using hardware emulation, with captured primary signals used for reconstruction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pure simulation is used to test and analyze circuit designs, then comprehensive signal analysis is achieved, but simulation time and computing resources increase exponentially with design complexity
Solution Approach 1:
The circuit design is divided into multiple partitions, each of which can be simulated independently. This segmentation reduces the computational complexity from simulating the entire circuit to simulating smaller partitions, thereby reducing simulation time while maintaining comprehensive signal analysis capability through the combination of partition results.
2Productivity
If pure emulation is used to reproduce circuit behavior, then simulation speed is improved, but hardware resources are consumed and bandwidth limitations reduce visibility
Solution Approach 1:
The circuit design is partitioned into smaller sub-circuits that can be emulated separately. This reduces the hardware resource requirements for each emulation instance and decreases the bandwidth needed to capture signal values, while still achieving fast simulation through parallel or sequential emulation of partitions.
Solution Approach 2:
Only the necessary signal values from partition interfaces are captured during emulation, rather than capturing all internal signals. This extraction approach reduces hardware resource consumption and bandwidth requirements while maintaining sufficient visibility for comprehensive circuit analysis through subsequent simulation of extracted signals.
3Loss of information
If all signal values are captured during emulation, then complete visibility is achieved, but bandwidth requirements exceed available capacity and emulator performance degrades
Solution Approach 1:
Only the essential signal values at partition interfaces are extracted and captured during emulation, rather than capturing all internal signals. This selective extraction maintains complete visibility needed for comprehensive circuit analysis while reducing bandwidth requirements to within available capacity, thereby preserving emulator performance.
Data Source
AI summary
Disclosed are techniques for simulation of a circuit design using a set of primary signals captured by a hardware emulation system. In preparation for simulation, the circuit design is divided into partitions that are substantially uniform in size. Sequential dependencies are then identified based on signals that cross partitions. The set of primary signals includes signals that, when provided as input to the simulation, break the sequential dependencies such that each partition can be simulated independently. Techniques for determining which signals to include in the set of primary signals are also disclosed. The hardware emulation system is configured to capture values of the primary signals as part of emulating the circuit design. Afterwards, the simulation is performed using the captured values. During the simulation, non-primary signals are reconstructed using values obtained from simulating each partition independently.