Circuit Placement With Overlapping Region Constraint Compensation

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Solution Overview

Problem

Existing electrostatics-based non-linear global placement approaches have limited success in handling complex region constraints commonly found in commercial circuit designs, particularly when these constraints overlap, leading to challenges in achieving global electrostatic equilibrium.

Innovation Solution

A method and system that adjust capacity levels for placement bins in a target IC by compensating for resource demand imbalances using a max-flow-based capacity compensation process, adding virtual capacity to achieve electrostatic equilibrium, and iteratively update placements based on density gradients to handle overlapping region constraints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If electrostatics-based non-linear global placement approaches are used, then high quality solutions and good scalability are achieved, but limited success occurs when applied to complex overlapping region constraints

Engineering Contradiction:
Improveplacement qualityVSAvoidsuccess rate with overlapping constraints
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies local quality by adjusting capacity levels specifically for placement bins that fall within overlapping region constraints. Instead of treating all bins uniformly, the system identifies bins affected by region constraints and modifies their capacity levels locally to reflect the additional demand imposed by multiple overlapping constraints, thereby enabling the electrostatics-based approach to successfully handle complex constraint scenarios while maintaining overall placement quality

Inventive Principle:
Principle #3Local quality

2Stability of the object's composition

If capacity levels are adjusted for placement bins with overlapping region constraints, then global electrostatic equilibrium is achieved, but computational complexity increases

Engineering Contradiction:
Improveelectrostatic equilibriumVSAvoidcomputational complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-computing the adjusted capacity levels for all placement bins before executing the electrostatics-based placement algorithm. The system identifies which bins are affected by overlapping region constraints and calculates their adjusted capacity levels in advance, allowing the main placement algorithm to proceed with the pre-adjusted capacities without needing to perform complex real-time adjustments during iteration, thus achieving equilibrium while controlling computational complexity

Inventive Principle:
Principle #10Preliminary action

3Productivity

If tracked levels of demand are adjusted based on indicated capacity levels and target utilization, then resource utilization is optimized, but the number of iterations required increases

Engineering Contradiction:
Improveresource utilization efficiencyVSAvoiditeration time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies feedback by implementing an iterative adjustment mechanism where tracked levels of demand are continuously updated based on the difference between indicated capacity levels and target utilization levels. The system monitors resource utilization in each placement bin and adjusts demand levels in subsequent iterations to drive utilization toward the target, creating a closed-loop control system that optimizes resource allocation while converging to a solution

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12572728B2Electrostatics-based global placement of circuit designs having overlapping region constraints
Publication Date: 2026.03.10 XILINX INC
  • US12572728B2 patent drawing
  • US12572728B2 patent drawing
  • US12572728B2 patent drawing

AI summary

Globally placing a circuit design includes adjusting indicated capacity levels for placement bins associated with a target integrated circuit, based on first levels of demand for resources by instances in the circuit design in regions of the target IC. Region constraints restrict placement of the instances in the regions, and the regions include two or more two or more overlapping regions. Tracked levels of demand for resources in the placement bins are adjusted, after adjusting the indicated capacity levels, based on the indicated capacity levels, a target utilization level of the resources in the placement bins, and a current placement. The current placement of the instances is updated based on a density gradient of an electrostatics-based model of the tracked levels of demand, and repeating adjusting the tracked levels of demand and updating the current placement are repeated in response to the density gradient failing to satisfy a threshold.