Circuit Layout Routing with Controlled Curvature at Turning Points
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Solution Overview
Problem
Existing automatic routing algorithms in micro-nano processing technologies often produce routing paths with large bends, failing to meet the design requirements for chips needing small curvature, thereby limiting their applicability.
Innovation Solution
A circuit layout routing method and apparatus that calculates turning starting positions and radii for routing paths, using U-shaped square frames to guide the turning, allowing for controlled curvature adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a routing path is controlled to be arranged along grid lines or pass through rectangular regions, then the routing path connects components or solder joints in the routing region, but the routing path has large bends at turning points which does not meet design requirements of chips requiring small curvature
Solution Approach 1:
The patent applies curvature principle by replacing traditional horizontal and vertical routing paths with arc-shaped routing paths. The routing path includes a first arc-shaped routing path and a second arc-shaped routing path that connect components through curved trajectories instead of straight lines with sharp bends. This resolves the contradiction by achieving small curvature at turning points while maintaining the connectivity function, thus improving manufacturing precision for curvature-sensitive chip designs.
Solution Approach 2:
The patent changes the routing path parameters from fixed grid-aligned straight lines to variable arc-shaped curves with controllable curvature radii. By adjusting the curvature radius parameter of the arc-shaped paths, the system can achieve small curvature at turning points to meet design requirements. This parameter change enables the routing algorithm to adapt to different curvature requirements, thereby improving both manufacturing precision and applicable scope.
2Ease of manufacture
If a routing path is controlled to be arranged along grid lines, then the routing path is easy to generate using automatic routing algorithms, but the routing path has large bends at turning points affecting applicable scope
Solution Approach 1:
The patent replaces straight grid-aligned paths with arc-shaped curved paths that maintain ease of generation through mathematical parametric definitions. The arc-shaped routing paths are defined by start points, end points, and curvature radii, allowing automatic generation while achieving smooth transitions with small curvature at turning points. This resolves the contradiction by maintaining manufacturing ease through algorithmic generation while improving manufacturing precision through curved geometry.
3Productivity
If traditional automatic routing algorithms are used, then the routing process is simple and fast, but the routing paths do not meet design requirements of chips requiring small curvature
Solution Approach 1:
The patent maintains routing efficiency by using parametric arc equations that can be quickly calculated and generated. The arc-shaped routing paths are defined by simple mathematical relationships between start points, end points, and curvature radii, allowing fast computation. This resolves the contradiction by achieving both high productivity through efficient calculation and high manufacturing precision through small curvature arcs that meet chip design requirements.
Solution Approach 2:
The patent changes from fixed grid-based routing parameters to variable arc curvature parameters while maintaining algorithmic efficiency. By adjusting the curvature radius parameter, the system can generate routing paths that meet small curvature requirements without significantly increasing computational complexity. This parameter change enables the system to maintain high productivity while achieving the manufacturing precision needed for curvature-sensitive designs.
Data Source
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AI summary
The present disclosure discloses a circuit layout routing method and apparatus, a device, a storage medium, and a product, and relates to the field of micro-nano processing technologies. The method includes: obtaining position information of at least one routing point in a circuit layout from routing planning information of the circuit layout (41); calculating, based on the position information, a turning starting position and a turning radius corresponding to each of the at least one routing point (42); and generating a routing path through the at least one routing point based on the turning starting position and the turning radius, the routing path turning at the turning starting position with the turning radius (43). The foregoing solution expands an applicable scenario of an automatic routing algorithm.