Circuit Design Simulation Using Executable Subsystems
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Solution Overview
Problem
Computer systems face inefficiencies in simulating circuit designs due to the significant computational overhead from iterative subsystems with a large number of blocks, leading to increased simulation time.
Innovation Solution
A design processing tool recognizes replaceable subsystems in circuit designs, converts them into executable programs, and schedules activation of other blocks during simulation, bypassing the subsystem with a single call to the executable program, thereby reducing event handling and block scheduling overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If hierarchical block models are used to represent circuit designs, then design accuracy and completeness are maintained, but simulation time and computational overhead increase significantly
Solution Approach 1:
The circuit design is segmented into replaceable subsystems that can be independently identified and converted. The design processing tool scans the circuit design to identify subsystems bounded by input and output ports, allowing selective optimization of specific portions while maintaining overall design accuracy.
Solution Approach 2:
Identified replaceable subsystems are copied into separate executable programs rather than being simulated through hierarchical block models. This copying process creates standalone executable versions that can be run independently, significantly reducing simulation overhead while preserving functional accuracy.
2Reliability
If iterative subsystems with large numbers of blocks are simulated using traditional block models, then complete functional verification is achieved, but computational resources and processing time are excessively consumed
Solution Approach 1:
The invention extracts iterative subsystems from the main circuit design and isolates them as separate executable programs. This extraction removes the computational burden of simulating large numbers of blocks while maintaining the ability to verify their functionality through independent execution.
Solution Approach 2:
The invention changes the execution parameter from block-by-block simulation to direct executable program invocation. By converting subsystems into executable form, the simulation process jumps from detailed block-level parameter changes to coarser program-level execution, dramatically improving processing efficiency.
3Reliability
If all blocks in a circuit design are activated during simulation, then comprehensive testing is performed, but event handling and block scheduling overhead increase
Solution Approach 1:
The invention performs preliminary actions by pre-identifying and pre-converting subsystems into executable programs before the main simulation process. This preliminary conversion eliminates the need for complex event handling and block scheduling during simulation, as executables are self-contained and require minimal orchestration.
Data Source
AI summary
Approaches for simulating and processing a circuit design involve recognizing by a design processing tool a replaceable subsystem in a circuit design having multiple blocks. The replaceable subsystem includes a subset of the blocks. The design tool converts the subset of blocks into an executable program and schedules activation of blocks of the circuit design other than the subset of blocks during simulation of the circuit design. The scheduled blocks are activated during simulation according to the scheduling, and activation of the subset of the plurality of blocks is bypassed during simulation with a call to the executable program.