Circuit Simulation Acceleration via Model Caching
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Solution Overview
Problem
Current circuit simulation methods are inefficient in simulating complex circuits with thousands of transistors, as they spend a significant amount of time computing transistor characteristics, which can take weeks and consume substantial resources without maintaining high accuracy, especially when dealing with analog/mixed-signal full-chip systems.
Innovation Solution
The method involves grouping transistors by type and topology, using approximate input values to determine if a device is in the same state as a previously evaluated one, and employing a model cache with a hashing algorithm to quickly retrieve and extrapolate output values, thereby reducing redundant calculations and memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transistor characteristics are computed using traditional circuit simulation methods, then simulation accuracy is maintained, but simulation time increases significantly (taking weeks) and computational resources are consumed
Solution Approach 1:
The patent pre-computes and stores transistor model parameters (such as Vth, gm, ro) in lookup tables before simulation begins. During simulation, these pre-computed parameters are retrieved directly rather than being calculated in real-time, which dramatically reduces simulation time while maintaining accuracy. This preliminary preparation of data resolves the contradiction between maintaining precision and reducing time loss.
Solution Approach 2:
The patent creates simplified copies of transistor models with pre-extracted parameters that can be quickly evaluated during simulation. Instead of using full complex transistor models, the invention uses copied parameter sets stored in lookup tables that replicate the essential behavior of transistors without the computational overhead, thus maintaining accuracy while reducing simulation time from weeks to manageable levels.
2Measurement precision
If full transistor level simulation is performed on complex circuit systems, then high accuracy is achieved, but computational cost increases significantly
Solution Approach 1:
The patent segments the circuit simulation into distinct parts: devices are grouped by type and topology, and only representative devices from each group are fully simulated. The results are then copied to other devices in the same group. This segmentation reduces computational cost by avoiding redundant calculations while maintaining accuracy through systematic grouping and parameter copying.
Solution Approach 2:
The patent changes the simulation approach from computing full transistor characteristics to using pre-extracted parameters stored in lookup tables. By transforming the problem from solving complex differential equations to retrieving and interpolating pre-computed parameters, the computational cost is dramatically reduced while maintaining the necessary simulation accuracy.
3Productivity
If model cache with hashing algorithm is used to retrieve previously calculated output values, then simulation speed increases, but system memory consumption increases
Solution Approach 1:
The patent merges devices of the same type and topology into groups, storing model parameters in shared lookup tables rather than maintaining separate data structures for each device. This merging reduces the total memory footprint while still enabling fast retrieval through hashing, as the combined data structure is more compact than individual device representations would require.
Solution Approach 2:
The patent implements local caching strategies where model parameters are stored in lookup tables with appropriate granularity. Instead of caching all possible device states globally, the invention caches parameters locally for each device type and topology combination, reducing overall memory consumption while maintaining fast access speeds through localized hashing structures.
Data Source
AI summary
A mechanism for improving speed of simulation of complex circuits that include transistors and other devices that share similar properties is provided. Circuit simulation speed is improved by efficiently identifying transistors and other devices having identical properties that share a same state at the time of interest in the simulation. Transistors and other devices are collected into groups having the same characteristics and topologies prior to simulation. Then during simulation, a determination is made as to whether a previously-evaluated transistor or device in the same group as a presently-being evaluated transistor or device has terminal input values that are the same, or nearly the same. If so, then output values of the previously-evaluated transistor or device are used in calculating the output values of the present transistor or device.