Circuit Simulation Using Row-Matching Table and Port State Vector

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Solution Overview

Problem

Existing methods for simulating User Defined Primitives (UDPs) in circuit designs face inefficiencies due to high computational costs and large memory requirements, particularly in handling input value combinations and value change histories, which impact simulation performance and memory utilization.

Innovation Solution

The method involves storing a row-matching table and a port state vector in memory, where the row-matching table contains encoded input match patterns and output values, and the port state vector includes input state codes. This allows for fast bit-to-bit pattern matching to determine the output value, reducing computational expense and memory usage by encoding states and match patterns for efficient comparison.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the UDP state table is expanded to include every possible combination of input values, then the completeness of input coverage is improved, but the memory requirement and computational complexity increase exponentially

Engineering Contradiction:
Improveinput coverage completenessVSAvoidstate table size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the UDP state table into a compressed representation using sparse encoding. Instead of storing every possible input combination, it uses a segmented approach where only relevant input combinations are stored with their corresponding output values, reducing the state table size while maintaining complete input coverage capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter representation from dense binary encoding to compressed sparse encoding. By transforming the state table into a compressed format that stores only essential input-output mappings, it reduces memory requirements while preserving the ability to handle all possible input combinations through the compressed representation.

Inventive Principle:
Principle #35Parameter changes

2Speed

If a polynomial formula is used to calculate table index from input values, then the lookup operation becomes constant time, but the computational cost increases due to high constant values

Engineering Contradiction:
Improvelookup operation speedVSAvoidcomputational cost
Core Design Contradiction:
SpeedVSPower

Solution Approach 1:

The patent creates a compressed copy of the state table that preserves the essential mapping relationships between input values and output values. This compressed copy can be searched more efficiently, reducing the computational cost of lookup operations while maintaining the speed benefit of constant time access through the compressed structure.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent changes the indexing mechanism by transforming the dense state table into a compressed format that allows for more efficient searching. This parameter change in the data structure enables faster lookup operations with lower computational cost by avoiding the expensive polynomial calculations while maintaining constant time access capability.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If value change history is maintained for input signals to detect edges, then the accuracy of edge detection is improved, but the simulation time increases

Engineering Contradiction:
Improveedge detection accuracyVSAvoidsimulation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts only the essential information needed for edge detection from the full value change history. By maintaining only the necessary state information about input signal changes rather than the complete history, it achieves accurate edge detection while significantly reducing the time required for simulation operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter storage from complete value change history to compressed edge detection state. This transformation allows the system to maintain accurate edge detection capability while reducing the memory and time requirements by storing only the essential change information rather than the full historical data.

Inventive Principle:
Principle #35Parameter changes

4Reliability

If the UDP state table is enlarged to store all input combinations, then the completeness of functionality representation is improved, but the memory available for other simulation models is reduced

Engineering Contradiction:
Improvefunctionality representation completenessVSAvoidavailable memory
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent creates a compressed copy of the UDP state table that maintains complete functionality representation with reduced memory footprint. This compressed representation allows the system to store all necessary input-output mappings while consuming significantly less memory, thereby preserving memory availability for other simulation models.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent transforms the state table parameters from dense to compressed encoding, reducing the memory required to store UDP functionality while maintaining complete representation capability. This parameter transformation enables the system to represent all input combinations efficiently without consuming excessive memory resources.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9582619B1Simulation of a circuit design block using pattern matching
Publication Date: 2017.02.28 XILINX INC
  • US9582619B1 patent drawing
  • US9582619B1 patent drawing
  • US9582619B1 patent drawing

AI summary

An approach for simulating a block of a circuit design includes using a row-matching table and a port state vector. The row-matching table includes a plurality of rows, and each row includes encoded input match patterns corresponding to a plurality of input ports of the block and an associated output value. The port state vector includes input state codes associated with the input ports. In response to an update of an input signal value at one of the input ports during simulation, the input state code associated with the one input port is updated according to the updated input signal value. A bit-to-bit pattern match is performed for each bit in the port state vector to a corresponding bit in the encoded input match patterns in one or more rows of the row-matching table. The associated output value of a matching row is selected as a new output value.