Circuit Arrangement with Storage Choke for Parasitic Current Reduction
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Solution Overview
Problem
In power electronic converter circuits with series-connected power semiconductors, parasitic currents due to coupling capacitances cause significant challenges, particularly with rapidly switching components, leading to high undesirable currents and increased costs due to the need for reduced coupling capacitances and additional filtering measures.
Innovation Solution
A circuit arrangement incorporating a power semiconductor switch, a freewheeling diode, a storage choke, and a driver circuit, where the storage choke's winding is inductively coupled to an additional winding to manage potential jumps and reduce parasitic currents, allowing for greater flexibility in component placement and signal transmission without significant additional effort or cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If rapid switching of power semiconductor switches is used to improve power conversion efficiency, then power conversion efficiency is improved, but parasitic currents due to coupling capacitances increase
Solution Approach 1:
A common mode filter is introduced as an intermediary component between the power semiconductor switches and the driver circuits. This filter acts as a mediator that blocks the transmission of parasitic common mode currents generated during rapid switching operations, while allowing the useful differential mode signals to pass through. The filter includes common mode chokes and capacitors that specifically target and suppress the harmful common mode currents without affecting the normal power conversion operation.
Solution Approach 2:
The patent converts the harmful parasitic currents into a manageable common mode signal that can be filtered. By recognizing that the parasitic currents manifest as common mode voltages and currents, the invention uses common mode filtering techniques to transform this harmful effect into a controllable parameter that can be eliminated through proper filtering, thereby turning the problem into a solvable engineering challenge.
2Object-generated harmful factors
If coupling capacitances are reduced to minimize parasitic currents, then parasitic currents are reduced, but component selection is limited and costs increase
Solution Approach 1:
Instead of modifying the inherent coupling capacitances of the power semiconductor switches, the patent introduces a common mode filter as an intermediary solution. This filter provides the necessary capacitance for parasitic current suppression without requiring changes to the power semiconductor components themselves, thereby maintaining full component selection flexibility and avoiding additional costs associated with specialized low-capacitance devices.
3Object-generated harmful factors
If filter measures are implemented to reduce parasitic currents, then parasitic currents are reduced, but additional effort and costs are incurred
Solution Approach 1:
The common mode filter is designed to serve multiple functions simultaneously: it suppresses parasitic common mode currents, maintains signal integrity for driver circuits, and works effectively across different power semiconductor switch configurations. This multi-functionality reduces the need for additional specialized filtering components and simplifies the overall circuit design.
Solution Approach 2:
The patent converts the complex problem of parasitic current suppression into a standard common mode filtering application. By framing the parasitic currents as common mode signals, the invention leverages well-established common mode filter designs and components, avoiding the need for custom complex filtering solutions and reducing overall system complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces potential jumps within the driver circuit, allowing for more flexible component placement and efficient signal transmission, reducing parasitic currents and associated costs while maintaining effective control of the power semiconductor switch.
Implementation Method 1
a storage choke (7) having a winding (10) between a first choke terminal (8) and a second choke terminal (9) and a core (11), wherein the storage choke (7) is configured to conduct a current flowing across the power semiconductor switch (2)
Implementation Method 2
a driver circuit (12), wherein the driver circuit (12) is configured to drive the power semiconductor switch (2) via the control terminal (3) thereof, wherein driving is effected by applying a voltage between the control terminal (3) and the reference potential terminal (4) of the power semiconductor switch (2), wherein a current flow from the controlled terminal (5) to the reference potential terminal (4) is controlled
Data Source
AI summary
A circuit arrangement includes a power semiconductor switch, a freewheeling diode, and a storage choke having a core and a winding coupled between a first choke terminal and a second choke terminal. The storage choke is configured to conduct a current flowing across the power semiconductor switch. The arrangement also includes a driver circuit configured to drive the power semiconductor switch via the control terminal thereof.