Subset Synthesis for Circuit Design Error Correction
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Solution Overview
Problem
The process of mapping circuit designs to configurable integrated circuits often results in poor quality due to the requirement for expert-level expertise, as existing CAD tools demand synthesis of the entire RTL design at once, making it non-intuitive and inefficient.
Innovation Solution
A system and method that allow users to select and synthesize only a subset of the code for a circuit design, using CAD tools to identify and correct errors, perform technology mapping, clustering, packing, and routing, enabling quick and accurate place and route behaviors, even for users without expertise in the IC architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the entire RTL design is synthesized at once using existing CAD tools, then the circuit design can be mapped to the configurable integrated circuit, but the process requires expert-level expertise and produces poor quality results
Solution Approach 1:
The patent divides the RTL design into multiple subsets or modules that can be synthesized independently. Instead of requiring synthesis of the entire design at once, the system allows users to select and synthesize specific portions of the circuit design, making the process more manageable and less error-prone while improving mapping quality through focused optimization of each segment.
2Productivity
If the entire RTL design is synthesized at once, then complete circuit functionality is achieved, but the process is time-consuming and inefficient
Solution Approach 1:
By segmenting the synthesis process into smaller independent tasks, the system enables parallel processing and iterative refinement of different circuit portions. Users can synthesize critical path segments first and refine them repeatedly, rather than waiting for complete synthesis of the entire design, thereby reducing total development time.
Solution Approach 2:
The system performs preliminary synthesis on selected subsets of the RTL design before final complete synthesis. This allows users to identify and correct errors in specific modules early in the design process, obtain preliminary timing estimates, and make design decisions without waiting for full synthesis completion.
3Manufacturing precision
If expert-level knowledge is required to use CAD tools effectively, then high-quality mappings can be achieved, but the tools become complex and difficult to operate
Solution Approach 1:
The system incorporates automated error detection and correction capabilities that perform quality checks and suggest fixes without requiring expert user intervention. The tool automatically analyzes synthesized subsets for errors, provides diagnostic information, and can apply corrections, enabling non-expert users to achieve high-quality mappings through guided automation rather than manual expert techniques.
Data Source
AI summary
A method is provided for processing code for a circuit design for an integrated circuit using a computer system. The method includes receiving at least a portion of the code for the circuit design for the integrated circuit, wherein the portion of the code comprises an error or has incomplete constraints, making an assumption about the error and the missing constraints using a computer aid design tool, and generating a revised circuit design for the integrated circuit with the error corrected and any missing constraints added based on the assumption and based on the code using the computer aided design tool and a library of components for circuit designs.