Component Built-in Circuit Substrate Resistor Protection
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Solution Overview
Problem
Conventional component built-in circuit substrates face defects due to damage from roughening processes and imperfect filling of solder resist, leading to adhesion issues and short circuits during the lamination and heating processes.
Innovation Solution
A component built-in circuit substrate structure featuring a core layer with connecting electrodes, a solder part, a resist, and a sealing resin part that covers the resist and solder part, preventing damage during roughening and ensuring complete filling to prevent short circuits, along with a method involving thermosetting resin and solder particles for solder joining and sealing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a solder resist is formed in an exposed state on the inner layer, then the solder resist can be applied to protect mounting lands, but the solder resist is damaged during roughening process and causes defects
Solution Approach 1:
The patent applies solder resist before the roughening process rather than after. The inner layer is first treated with solder resist coating, then undergoes roughening. This preliminary application ensures the solder resist is already in place to protect mounting lands during subsequent roughening operations, preventing damage and defects that would occur if applied afterward.
2Device complexity
If solder resist unformed parts are left between adjacent mounting lands, then the solder resist structure is simplified, but imperfect filling occurs during lamination and heating causing short circuits
Solution Approach 1:
The patent implements solder resist not only on mounting lands but also in the spaces between adjacent mounting lands. This local extension of solder resist coverage ensures that gaps between lands are filled and protected, preventing solder bridge formation and short circuits during subsequent heating and lamination processes, while maintaining the overall simplicity of the structure.
3Strength
If the core layer undergoes roughening process after electronic components are mounted, then adhesion between interlayer insulating layer and core layer is improved, but the solder resist and solder parts are damaged
Solution Approach 1:
The patent performs the roughening process on the core layer before mounting electronic components, not after. The sequence is: apply solder resist to inner layer, perform roughening, then mount components. This preliminary roughening achieves the required adhesion strength for interlayer lamination while protecting the solder resist and solder joints from damage that would occur if roughening were performed after component mounting.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively prevents defects such as solder part damage and short circuits by ensuring the resist and solder are protected and properly filled, enhancing the reliability and packaging density of the substrate.
Implementation Method 1
heating the core layer to melt and solidify the solder particles to form a solder part joining between the electrodes and the connecting terminals
Implementation Method 2
by thermally hardening the thermosetting resin to fill a gap between the bottom surface of the electronic component and the front surface of the core layer
Data Source
AI summary
A core layer has on its front surface a pair of connecting electrodes forming a wiring pattern and a resist formed between the pair of electrodes; an electronic component having a pair of connecting terminals; a solder part joining between electrodes and connecting terminals; and a sealing resin part filling a gap between the bottom surface of the electronic component and the front surface of the core layer and covering the resist and the solder part, to prevent a defect of a component built-in printed circuit substrate.


