Insulated Circuit Substrate Layout to Reduce Thermal Warping
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Solution Overview
Problem
The insulated circuit substrate in semiconductor devices experiences warping due to thermal expansion coefficient differences between ceramic and metal components, leading to cracks and reduced thermal conductivity and insulating properties, affecting long-term reliability.
Innovation Solution
The semiconductor device design includes a circuit pattern with a predetermined distance and thickness greater than or equal to 0.1 of the semiconductor chip's side length, bonded to the chip with its side edges spaced inwardly from the pattern's edge, and uses a resin layer with low thermal resistance and high insulating properties to minimize thermal expansion differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a ceramic plate is used as the base plate in the insulated circuit substrate, then high thermal conductivity and insulating properties are achieved, but differences in thermal expansion coefficient between the ceramic plate and the circuit pattern cause warping
Solution Approach 1:
The patent changes the material parameter of the base plate from ceramic to resin, which has a thermal expansion coefficient closer to that of the circuit pattern. This parameter change reduces the differential thermal expansion between components, thereby minimizing warping while maintaining adequate thermal management capabilities through the resin material's inherent properties
Solution Approach 2:
The patent employs a composite structure where the resin base plate is combined with a heat dissipation plate made of high-thermal-conductivity material. This composite approach allows the resin to provide dimensional stability and reduce warping, while the heat dissipation plate compensates for thermal management requirements, achieving both low warping and effective heat dissipation
2Length of stationary object
If the circuit pattern is made thinner to reduce overall substrate thickness, then compactness is improved, but the circuit pattern becomes more susceptible to damage from warping and heat cycling
Solution Approach 1:
The patent increases the thickness parameter of the circuit pattern to be greater than or equal to 0.1 times the length of one side of the semiconductor chip. This thickness increase provides greater mechanical strength and crack resistance, allowing the circuit pattern to withstand warping and heat cycling without damage while still maintaining a compact overall substrate design
3Area of stationary object
If the semiconductor chip is bonded close to the edge of the circuit pattern to maximize space utilization, then area efficiency is improved, but the circuit pattern becomes more vulnerable to damage from thermal stress
Solution Approach 1:
The patent establishes a predetermined spacing distance between the semiconductor chip edge and the circuit pattern edge, creating a protective buffer zone before thermal stress can reach critical levels. This preliminary protective measure prevents damage by ensuring the circuit pattern maintains sufficient structural integrity even under thermal expansion and contraction forces
Solution Approach 2:
The patent applies different quality requirements to different regions: the circuit pattern has increased thickness for strength, while the spacing distance varies based on local stress conditions. This localized quality approach optimizes both space utilization and damage resistance by concentrating structural reinforcement where thermal stress is most critical
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces warping and maintains heat dissipation performance, preventing a decrease in thermal conductivity and enhancing the long-term reliability of the semiconductor device.
Implementation Method 1
differences in thermal expansion coefficient between the ceramic plate and the circuit pattern and between the ceramic plate and the metal plate. Therefore, the insulated circuit substrate is warped by heat generated by the semiconductor chips
Data Source
AI summary
A semiconductor device, including an insulated circuit substrate that has a base plate, a resin layer disposed on a front surface of the base plate, and a circuit pattern disposed on a front surface of the resin layer; and a semiconductor chip that is rectangular in a plan view of the semiconductor device and is bonded to a front surface of the circuit pattern in such a manner that a side edge of the semiconductor chip is spaced inwardly from an outer peripheral edge of the circuit pattern by at least a predetermined distance. Both the predetermined distance and a thickness of the circuit pattern are greater than or equal to 0.1 of a length of one side of the semiconductor chip.