Circuit Substrate Wiring Parasitic Capacitance Uniformization
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Solution Overview
Problem
Circuit substrates face challenges in maintaining signal quality due to variations in characteristic impedance caused by parasitic capacitance, which degrades signal transmission characteristics.
Innovation Solution
The circuit substrate design features varying widths of the insulating layer between conductive layers and vias, with narrower widths farther from vias and wider widths closer to vias, to minimize parasitic capacitance and maintain consistent characteristic impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the insulating layer width is kept uniform around the wiring, then the manufacturing process is simple, but parasitic capacitance varies causing characteristic impedance deterioration
Solution Approach 1:
The insulating layer width is varied locally based on position: wider at locations closer to the via (where parasitic capacitance is higher) and narrower at locations farther from the via (where parasitic capacitance is lower). This local variation compensates for the non-uniform parasitic capacitance distribution, maintaining consistent characteristic impedance along the wiring without requiring complex manufacturing processes.
2Manufacturing precision
If the insulating layer width is varied to compensate parasitic capacitance, then characteristic impedance consistency is improved, but manufacturing complexity increases
Solution Approach 1:
The width parameter of the insulating layer is changed systematically based on its radial distance from the via center. By controlling only this single geometric parameter rather than introducing complex multi-layer structures or additional components, the patent achieves characteristic impedance consistency while keeping the manufacturing process relatively simple.
3Device complexity
If uniform insulating layer width is used, then device structure is simple, but signal transmission quality deteriorates due to impedance variation
Solution Approach 1:
The insulating layer width is varied locally based on position: wider at locations closer to the via (where parasitic capacitance is higher) and narrower at locations farther from the via (where parasitic capacitance is lower). This local variation compensates for the non-uniform parasitic capacitance distribution, maintaining consistent characteristic impedance along the wiring without requiring complex manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces variations in characteristic impedance, enhancing signal transmission characteristics and improving signal quality by maintaining consistent impedance across the substrate.
Implementation Method 1
variations in characteristic impedance caused by parasitic capacitance
Data Source
AI summary
A circuit substrate includes an insulating body, a wiring enclosed by the insulating body, a conductive layer formed within the insulating body on a same plane as the wiring, and electrically insulated from the wiring by the insulating body, and one or more conductive vias extending through an edge portion of the conductive layer in a thickness direction intersecting the plane. A first width of the insulating body between the wiring and the conductive layer at a first position in the plane direction that does not correspond to any of said one or more conductive vias is smaller than a second width of the insulating body between the wiring and the conductive layer at a second position in the plane direction that corresponds to one of said one or more conductive vias.