Automatic Circuit Synthesis via Iteration-Level Synchronization
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Solution Overview
Problem
Existing automatic circuit synthesis methods face challenges in achieving high performance due to rough approximations of data dependencies, leading to suboptimal scheduling and resource utilization in parallel task execution.
Innovation Solution
The method involves a synchronization unit associated with each channel, which collects iteration values from producer and consumer processes and freezes their execution based on execution position comparisons, ensuring correct synchronization and ordering to respect data dependencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If CDFG type representation is used to express dependencies between syntactic constructs, then the representation is simple and easy to implement, but it leads to gross over-approximation of dependencies and cannot find interesting ordering
Solution Approach 1:
The patent segments the computation into fine-grained operations rather than treating them as coarse syntactic constructs. By breaking down the CDFG nodes into individual operations and introducing iteration-level granularity, the system achieves precise dependency tracking without losing implementability. Each operation can be independently scheduled and analyzed for dependencies.
Solution Approach 2:
The patent introduces a new dimension of analysis by tracking dependencies at the iteration level rather than just at the syntactic construct level. This additional dimension allows for precise ordering of operations across different iterations while maintaining the structural simplicity of the original representation.
2Reliability
If fine-grained scheduling is applied to respect data dependencies between operations, then the correctness of the schedule is improved, but the complexity of scheduling increases
Solution Approach 1:
The patent performs preliminary analysis of data dependencies between operations during the compilation phase. By pre-computing the dependency relationships and representing them in a structured format, the actual scheduling process becomes simpler while still ensuring correctness. The heavy lifting of dependency analysis is done upfront rather than during runtime scheduling.
Solution Approach 2:
The patent introduces an intermediate representation that captures fine-grained operational dependencies without requiring complex scheduling logic. This intermediate structure acts as a mediator between the high-level algorithm and the final schedule, simplifying the scheduling process while maintaining correctness.
3Productivity
If parallel tasks are used to increase processing speed, then the calculation performance is improved, but the synchronization complexity and resource usage increase
Solution Approach 1:
The patent implements dynamic scheduling that adapts to the actual execution progress of parallel tasks. By monitoring the state of each task and adjusting the schedule in real-time, the system maximizes parallelism while minimizing synchronization overhead. Tasks can be dynamically assigned to different processing units based on current workload and dependency status.
Solution Approach 2:
The patent ensures continuous utilization of processing resources by carefully managing task synchronization. Rather than allowing idle periods due to premature synchronization, the system keeps tasks running continuously by predicting when synchronization points will be reached and scheduling subsequent tasks accordingly.
Data Source
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AI summary
Method of automatic synthesis of circuits comprising the generation of a network of regular processes reading or writing data in channels, according to which a single producer process is authorized to write in a channel and a single consumer process is authorized to read in a channel; and a synchronization unit associated with said channel authorizes or disables the implementation of a new iteration of said producer process, respectively consumer process, as a function of a comparison of a position of execution determined as a function of the value of a new iteration collected from the producer process, respectively consumer process, and of a position of execution determined as a function of a last iteration value collected from the consumer process, respectively producer process.