Circuit System With Multi-Layered Insulating Stack
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Solution Overview
Problem
The integration of analog circuitry in integrated circuits faces challenges due to the large size of components like capacitors and inductors, leading to reliability issues and premature breakdown under operating voltage, necessitating a solution for improved passive device integration on integrated circuits and printed circuit boards that enhances reliability and cost-effectiveness.
Innovation Solution
A circuit system is formed by creating a lower electrode over a substrate, followed by a resistive film, a multi-layered insulating stack, and an upper electrode, with dissimilar dielectric films reducing stress and preventing cracking, and incorporating a reference plane with holes to direct hillock formation away from potential shorting areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If passive devices are integrated onto integrated circuits to reduce system size and cost, then miniaturization and cost reduction are achieved, but reliability deteriorates due to premature breakdown under operating voltage
Solution Approach 1:
The passive device structure is segmented into multiple functional layers including lower electrode, resistive film, multi-layered insulating stack, and upper electrode. This segmentation allows each layer to perform its specific function optimally while distributing stress and reducing the risk of premature breakdown, thereby improving reliability while maintaining miniaturization
Solution Approach 2:
The patent employs composite material structures, particularly the multi-layered insulating stack composed of different dielectric materials with varying stress characteristics. This composite approach enables stress management and prevents cracking, resolving the contradiction between miniaturization and reliability
2Adaptability or versatility
If passive devices are added to integrated circuits to improve system performance, then analog processing capability is enhanced, but manufacturing complexity increases
Solution Approach 1:
The patent merges the fabrication processes of passive devices with the existing integrated circuit manufacturing workflow. By integrating passive device formation into the standard CMOS process flow, the patent enhances analog processing capability without significantly increasing manufacturing complexity, as both digital and passive components are fabricated in the same process sequence
3Ease of manufacture
If passive devices are integrated onto printed circuit boards to reduce overall system cost, then cost and size are reduced, but reliability deteriorates due to cracking and shorting issues
Solution Approach 1:
The multi-layered insulating stack is designed with dissimilar dielectric materials that have different stress characteristics, creating a cushioning effect that absorbs and distributes mechanical stress before it can cause cracking. This beforehand cushioning prevents reliability failures while maintaining cost-effectiveness
Solution Approach 2:
The resistive film serves as an intermediary layer between the lower electrode and the multi-layered insulating stack, providing stress relief and preventing direct contact that could lead to shorting. This intermediary structure resolves the contradiction between cost reduction through integration and reliability maintenance
Data Source
AI summary
A circuit system comprising: forming a lower electrode over a substrate; forming a resistive film over the lower electrode; forming a multi-layered insulating stack over a portion of the resistive film; and forming an upper electrode over a portion of the multi-layered insulating stack.