Electronic Circuit Testing System With Hierarchical Comparison Tree
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for testing integrated circuits are time-consuming and limited by the number of signal channels required, especially when testing multiple chips in parallel, as each chip needs a separate channel for receiving signals, which restricts the maximum number of chips that can be tested simultaneously.
Innovation Solution
A generic and reusable system for testing electronic circuits that includes a comparator and a comparison result recorder, capable of receiving test signals and ideal response signals, and transmitting test result signals, which can be applied to various types of circuits such as digital, analog, or mixed-signal circuits, and can be embedded within these circuits with minimal modifications, reducing the need for multiple signal channels by recording and processing comparison results efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallel testing is used to reduce total test time, then productivity is improved, but the number of signal channels required increases, which limits the maximum number of chips that can be tested simultaneously
Solution Approach 1:
Multiple chips share common signal channels by implementing local comparison circuits on each chip that perform initial response comparison, then aggregate results through a reduction tree structure. This merging approach allows N chips to be tested using only log2(N) comparison stages instead of requiring separate channels for each chip, thus reducing the total number of signal channels needed while maintaining parallel testing capability.
Solution Approach 2:
The patent introduces a hierarchical comparison structure with multiple stages arranged in a reduction tree. Instead of comparing all chips simultaneously in a single dimension (requiring N channels), the comparison is distributed across multiple dimensional stages (log2(N) stages), where each stage compares subsets of chips. This dimensional transformation reduces the channel requirement from linear to logarithmic scaling.
2Device complexity
If each chip is tested individually to reduce channel requirements, then device complexity is reduced, but test time increases significantly
Solution Approach 1:
The testing process is segmented into multiple independent comparison stages arranged in a reduction tree. Each stage processes a subset of chips independently using local comparison circuits, and results are progressively aggregated upward through the tree. This segmentation enables parallel processing of multiple chips simultaneously while using a manageable number of channels, achieving both reduced complexity and improved productivity compared to sequential testing.
Solution Approach 2:
Local comparison circuits are pre-configured on each chip to perform initial response comparison before results need to be transmitted. This preliminary action at the chip level filters out failing chips early in the process, reducing the number of chips that need further comparison in subsequent stages. The pre-positioned comparison capability eliminates the need for complex external comparison equipment for each chip.
Data Source
AI summary
A system for testing electronic circuits is configured to receive a test signal and an ideal response signal and output a test result signal. The system for testing electronic circuits includes a circuit portion to be tested, a comparator and a comparison result recorder. The circuit portion to be tested receives a test signal from a test instrument, and outputs a system response signal. The comparator receives the system response signal from the circuit portion to be tested and receives an ideal response signal from the test instrument. Then, the comparator outputs a comparison result according to the system response signal and the ideal response signal. The comparison result recorder receives and records the comparison result. The comparison result recorder may record comparison results within a period of test time. The test instrument can obtain a record of the comparison results from the comparison result recorder.