Circuit Timing Analysis Pessimism Reduction
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Solution Overview
Problem
Graph-based analysis (GBA) in integrated circuit design is overly pessimistic, leading to over-fixing of circuit designs, increased power consumption, and manufacturing costs due to its worst-case scenario approach, while path-based analysis (PBA) is too slow and computationally exhaustive for optimization processes.
Innovation Solution
Implement a method that selectively reduces pessimism in GBA by identifying critical paths and applying PBA only to those paths, providing a timing margin to adjust GBA results, thereby reducing over-fixing and maintaining efficiency, allowing for frequent evaluations of circuit modifications without excessive computational burden.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If graph based analysis is used for timing analysis, then analysis speed is improved, but pessimism increases leading to over-fixing
Solution Approach 1:
The patent segments the circuit analysis by identifying critical paths using graph-based analysis and then applying path-based analysis only to those specific paths. This segmentation allows the system to maintain the speed advantage of GBA for non-critical paths while applying the more accurate PBA to critical paths, thereby reducing overall pessimism without sacrificing analysis speed.
Solution Approach 2:
The patent applies different analysis qualities to different parts of the circuit. Critical paths receive the more detailed path-based analysis while non-critical paths use the faster graph-based analysis. This local differentiation of analysis quality reduces unnecessary pessimism in critical areas while maintaining efficiency elsewhere.
2Reliability
If path based analysis is used for timing analysis, then pessimism is reduced, but computational time increases significantly
Solution Approach 1:
The patent segments the complete circuit analysis into two stages: first using graph-based analysis to identify critical paths, then applying path-based analysis only to those identified critical paths. This segmentation dramatically reduces the total computational time compared to applying PBA to all paths, while still achieving accurate timing analysis for the critical portions of the circuit.
Solution Approach 2:
Instead of applying the more computationally intensive path-based analysis to all paths (excessive action), the patent applies it only to critical paths identified by graph-based analysis (partial action). This partial application of PBA achieves sufficient accuracy for timing validation without the excessive computational cost of full PBA.
3Productivity
If graph based analysis is used for optimization process, then efficiency is maintained, but over-fixing increases power consumption and area
Solution Approach 1:
The patent uses the timing margin information from path-based analysis of critical paths as feedback to adjust the graph-based analysis results. This feedback mechanism allows the optimization process to understand which areas truly require fixing and which are over-constrained, thereby reducing unnecessary design changes that would increase power consumption and area.
Solution Approach 2:
The patent changes the timing parameter requirements based on the analysis results. By calculating timing margins for critical paths and using this information to adjust GBA results, the system modifies the effective timing constraints to reflect actual critical path requirements rather than worst-case scenarios, reducing over-fixing and its associated power and area costs.
Data Source
AI summary
A method, system or computer usable program product for improving a circuit design having a set of endpoint circuits including identifying a subset of the set of endpoint circuits for further timing analysis based on graph based analysis (GBA) of the circuit design; performing path based analysis (PBA) of a set of endpoint circuit paths in the subset of endpoint circuits; and providing a timing margin between graph based analysis and path based analysis for each of the set of endpoint circuit paths for reducing pessimism in subsequent graph based analysis of the set of endpoint circuit paths.