Circuit Devices Reducing Fabrication Processes via Voltage Routing
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Solution Overview
Problem
The existing technologies for forming thin film transistors (TFTs) on glass substrates require different fabricating processes for transistors with varying gate insulating film thicknesses, leading to increased process complexity due to the need for transistors with different withstanding voltages.
Innovation Solution
A circuit device is designed with a configuration that allows a first voltage to be provided through one route and a second voltage through another, using switching devices with smaller withstanding voltages, enabling the same process to be used for all transistors by managing voltage differences between switching devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors with different gate insulating film thicknesses are used to achieve different withstanding voltages, then the required withstanding voltage requirements are met, but the number of fabricating processes increases
Solution Approach 1:
The patent changes the circuit configuration parameter (adding intermediate voltage supply routes) to enable the use of transistors with uniform gate insulating film thickness while still achieving different withstanding voltage requirements through multiple voltage supply paths (first route, second route, third route, fourth route)
2Reliability
If transistors with different gate insulating film thicknesses are used to achieve different withstanding voltages, then the voltage requirements are met, but the fabrication process complexity increases
Solution Approach 1:
The patent modifies the circuit architecture by introducing intermediate voltage supply routes (third route and fourth route providing voltages between the first and second voltages) to enable uniform transistor fabrication while meeting diverse withstanding voltage requirements through multiple supply paths
Data Source
AI summary
The invention provides a circuit device for reducing the number of fabrication processes. A circuit portion 12 provides power supply voltage V10 to a node N0 through a first route 52 and power supply voltage V−5 to the node N0 through a second route 62. The circuit device includes a TFT 50 disposed on the first route 52, a TFT 60 disposed on the first route 52 and coupled to the TFT 50, a TFT 60 disposed on the second route 62, a TFT 61 disposed on the second route 62 and coupled to the TFT 60, a third route 54 providing power supply voltage V5 between V10 and V−5 to between the TFT 50 and 51, and a fourth route 64 providing power supply voltage V0 between V10 and V−5 to between the TFT 60 and 61.