Circuit X Event Graph Analysis for Root-Cause Propagation Paths
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Solution Overview
Problem
Existing semiconductor circuit design methods face challenges in efficiently analyzing and addressing X propagation, which causes excessive power consumption and unexpected value generation due to unclear circuit states between logic 0 and logic 1, particularly in transistor-level designs where conventional EDA solutions are inadequate.
Innovation Solution
A circuit analysis method and device that builds a circuit graph from a netlist, extracts X events, links them to form an X event graph, and traverses this graph using a depth-first search algorithm to identify source and involvement X events, thereby finding the X propagation path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional EDA solutions are used for transistor-level circuit analysis, then existing analysis methods can be applied, but they are inadequate for efficiently analyzing and addressing X propagation in transistor-level designs
Solution Approach 1:
The patent introduces an X event graph as an intermediary data structure that bridges transistor-level circuit details and gate-level analysis requirements. This graph extracts and represents only the relevant X propagation events from transistor-level simulations, enabling efficient analysis without requiring full transistor-level verification while maintaining accuracy for identifying X propagation causes.
2Measurement precision
If exhaustive verification is performed to identify X propagation causes, then complete accuracy is achieved, but analysis time increases significantly
Solution Approach 1:
The patent extracts only the essential X propagation events from comprehensive transistor-level simulation data by building an X event graph that captures timing relationships and propagation paths. This extraction process filters out irrelevant information while preserving the critical data needed to identify X propagation causes, achieving accurate identification without requiring exhaustive verification of all circuit states.
3Productivity
If X propagation is not addressed, then design process continues, but excessive power consumption and unexpected value generation occur
Solution Approach 1:
The patent performs preliminary analysis by building the X event graph and identifying X propagation paths early in the design process, before final circuit implementation. By tracing back from observed X events to their source X events through the graph structure, the system identifies potential power consumption issues and unexpected value generation causes in advance, allowing designers to address these problems before they manifest in actual circuit operation.
Data Source
AI summary
Provided are a circuit analysis method, a circuit analysis device, and a circuit analysis system. An embodiment provides a circuit analysis method, including: building a circuit graph based on a netlist of a circuit; defining a node in the circuit graph; extracting an X (unknown) event for each node based on a waveform built as a result of simulation for the node; building an X event node from the X event that was extracted; building an X event graph by linking the X event node to at least one other X event node; traversing the X event graph and identifying a source X event and an involvement X event; and finding an X propagation path for the X event node, the X propagation path comprising the source X event and the involvement X event.