Circular Addressing for Speculative Data Load Fault Prevention
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Solution Overview
Problem
Speculative data loads in super-scalar and VLIW data processors often result in memory access faults due to invalid addresses, limiting their frequent use and hindering performance gains, as they can cause operating system faults and require extensive recovery, especially with 32-bit registers capable of specifying a vast number of data words.
Innovation Solution
Implementing circular addressing hardware or simulating it to restrict the address pointer range, ensuring that speculative data loads always point to valid memory addresses, thus preventing memory access faults and allowing earlier issuance of loads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If speculative data loads are issued before address confirmation, then processing speed is improved, but memory access faults occur due to invalid addresses
Solution Approach 1:
The patent applies preliminary action by issuing speculative data load instructions before the address is fully confirmed valid. The compiler generates speculative load instructions that execute ahead of time using predicted address values, and if the speculation is correct, the data is ready when needed. This resolves the contradiction by performing the load action in advance while managing the risk through validation mechanisms.
Solution Approach 2:
The patent uses an intermediary validation mechanism between the speculative load instruction and the actual data usage. A validation stage checks whether the speculative address was correct before the loaded data is committed. If validation fails, the speculative load is aborted and corrected. This intermediary validation resolves the contradiction by enabling early execution while protecting against invalid memory accesses.
2Adaptability or versatility
If speculative loads use full address space, then address flexibility is improved, but memory access faults increase due to invalid addresses
Solution Approach 1:
The patent applies local quality by validating only the specific portion of the address that determines memory region membership. Rather than validating the entire address space, the system checks local address bits that identify whether the address falls within a valid memory region. This resolves the contradiction by maintaining full address flexibility while preventing faults through targeted local validation.
3Reliability
If predication is used to prevent improper loads, then memory fault reliability is improved, but processing speed decreases due to delay
Solution Approach 1:
The patent applies preliminary action by performing validation of the speculative address before the load instruction executes. The validation determines early whether the speculative address is valid, allowing the load to proceed without delay if correct. This resolves the contradiction by establishing reliability through preliminary validation while maintaining speed by avoiding post-validation delays.
Data Source
AI summary
This invention prevents illegal memory address faults on speculative data loads. Circular addressing of the address pointer limits memory access to a range of addresses including all addresses used by the address pointer and not including any invalid addresses. The invention uses circular addressing hardware, if available on the data processor. If not available, this invention simulates circular addressing. This invention permits loads to be issued earlier than if predication were used and allows already predicated loads to be speculated without the overhead of a compound predicate. This invention can be used on processors without hardware supporting speculation.