CIS Pixel Capacitance Segmentation for Low Noise and High Full Well
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Solution Overview
Problem
CMOS Image Sensors face a trade-off between ultra-low noise and full well capacity due to limited capacitance, where minimizing capacitance reduces the voltage range, and adding extra components increases noise in low noise modes.
Innovation Solution
The solution involves adding capacitance in the reset path using a second switch in series with the reset gate and incorporating a capacitive element, such as a capacitor, between the switches to increase full well capacity without adding capacitance to the conversion node in low noise mode, allowing for extra capacitance during correlated double sampling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If capacitance of conversion node is minimized to achieve ultra-low noise, then noise level is reduced, but full well capacity is limited due to limited voltage range
Solution Approach 1:
The patent divides the capacitance function into two separate modes: a first conversion node capacitance for low noise mode and a second conversion node capacitance for high full well mode. This segmentation allows the system to optimize for noise in low light conditions while maximizing full well capacity in high light conditions, resolving the contradiction between minimizing noise and maximizing full well capacity.
Solution Approach 2:
The patent implements dynamic switching between two capacitance configurations using transfer gates. The system can dynamically reconfigure the conversion node capacitance based on lighting conditions - using low capacitance for ultra-low noise in dim conditions and high capacitance for extended full well in bright conditions. This dynamic adaptability resolves the static contradiction between noise minimization and full well maximization.
2Quantity of substance
If extra capacitance is added to increase full well by adding switch or FET in parallel, then full well is improved, but noise in low noise mode increases
Solution Approach 1:
The patent segments the capacitance into two distinct operational modes with separate conversion nodes. The first conversion node maintains low capacitance for ultra-low noise performance, while the second conversion node provides high capacitance for extended full well. This segmentation prevents the noise penalty that would result from always having extra capacitance components connected to the conversion node.
Solution Approach 2:
The patent uses transfer gates as intermediary elements to selectively connect different capacitance configurations to the readout circuitry. These transfer gates act as mediators that can isolate the low noise conversion node from the high capacitance components when operating in low noise mode, while enabling access to high capacitance when needed for extended full well operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the dynamic range of the CMOS Image Sensor by increasing full well capacity while maintaining low noise levels, enabling dual-mode operation for ultra-low light and high light conditions without saturating quickly.
Implementation Method 1
a photodiode 1, for generating an electric charge incident upon the photodiode 1
Implementation Method 2
a capacitive element disposed between the first and the second switches
Data Source
AI summary
An extended range Compatible Metal Oxide Semiconductor Image Sensor and method for operating it is provided, the sensor comprising: a first conversion node; a first switch connected to said first conversion node; a second switch disposed in series with said first switch; and a capacitive element disposed between said first and said second switches.