CKE Controller for DRAM Self-Refresh Power Management
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Solution Overview
Problem
Existing information processing systems face challenges in efficiently managing power-saving modes, particularly in volatile memory systems, where self-refresh modes are not effectively controlled, leading to inefficiencies in power management and data retrieval.
Innovation Solution
An information processing apparatus is designed with a CKE controller that manages the CKE signal to keep it low during self-refresh mode, allowing automatic refreshing in DRAM, and upon recovery, cancels the self-refresh mode by switching the CKE signal high, enabling quick return to normal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the memory controller stores CPU information in memory and shifts memory to self-refresh mode for power-saving, then power consumption is reduced, but the recovery time to normal operation increases
Solution Approach 1:
The CKE controller acts as an intermediary between the memory controller and the memory device. It receives the proxy request from the memory controller and independently manages the CKE signal to maintain self-refresh mode, enabling the memory controller to enter low-power state while the memory remains in self-refresh, thus reducing overall power consumption without extending recovery time
Solution Approach 2:
The system performs preliminary actions by storing CPU information in the memory before shifting to self-refresh mode, and by pre-configuring the CKE controller to maintain the CKE signal at appropriate levels. This preliminary preparation ensures that when recovery is needed, the memory can quickly exit self-refresh mode without requiring additional preparation time, thus reducing recovery time while maintaining power-saving benefits
2Reliability
If the CKE signal is kept low during self-refresh mode to maintain data integrity, then data retention is ensured, but the ability to quickly exit self-refresh mode is reduced
Solution Approach 1:
The CKE controller serves as an intermediary that manages the CKE signal independently. It maintains the CKE signal at low level during self-refresh to ensure data integrity, and upon receiving a cancellation request, it quickly switches the CKE signal to high level to enable rapid exit from self-refresh mode. This intermediary control resolves the contradiction by providing both data retention and fast recovery capabilities
Solution Approach 2:
The CKE signal is made dynamic through the CKE controller's ability to adjust its level based on operational requirements. The signal transitions from low level (maintaining self-refresh for data integrity) to high level (enabling quick exit), with the timing and level changes dynamically controlled by the CKE controller in response to proxy requests and cancellations, thus achieving both data integrity and fast exit speed
Data Source
AI summary
An information processing apparatus includes a memory that is volatile, a memory controller connected to the memory in an information exchangeable manner, and a clock enable (CKE) controller. The CKE controller controls a CKE signal in response to a request for a proxy in self-refresh control, the CKE signal being transmitted from the memory controller to the memory and being controlled to be kept low until cancellation of the proxy is requested. At a time of shifting to a power-saving mode, the memory controller stores information held by a central processing unit (CPU) in the memory and causes the memory to shift to a self-refresh mode. At a time of recovery from the power-saving mode, the memory controller requests the CKE controller for the cancellation of the proxy in the self-refresh control and thereafter cancels the self-refresh mode of the memory.