Clamp Circuitry Mitigates Reverse Bias Leakage in Memory Arrays
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Solution Overview
Problem
Resistance variable memory devices face significant reverse bias leakage during programming operations, leading to increased current consumption and inefficiency, as unselected memory cells are subjected to high reverse bias voltages, resulting in substantial leakage currents.
Innovation Solution
Incorporating clamp circuitry located in a gap adjacent to the row and column decoders, which is selectively coupled to the data lines, to control and reduce the reverse bias voltage across unselected memory cells during programming, thereby minimizing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If clamp circuitry is added to control reverse bias voltage, then leakage current is reduced, but device complexity increases
Solution Approach 1:
The clamp circuitry acts as an intermediary component inserted between the data lines and ground/reference potential. This mediator actively controls the reverse bias voltage by providing a clamping action that limits the maximum reverse voltage across unselected memory cells, thereby reducing leakage current without requiring fundamental changes to the memory array structure
Solution Approach 2:
The invention changes the voltage parameter across unselected memory cells during programming operations. By dynamically adjusting and clamping the reverse bias voltage to a controlled level, the system modifies the electrical conditions to minimize leakage current while maintaining the ability to program selected cells effectively
2Productivity
If reverse bias voltage is applied to unselected memory cells, then programming operation is enabled, but leakage current increases exponentially
Solution Approach 1:
The clamp circuitry applies different voltage conditions to different regions of the memory array. Unselected memory cells receive a clamped reverse bias voltage that limits leakage, while selected memory cells maintain the full programming voltage necessary for effective programming. This localized voltage control allows simultaneous optimization of both programming effectiveness and leakage reduction
Data Source
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AI summary
The present disclosure includes devices, methods, and systems for programming memory, such as resistance variable memory. One embodiment can include an array of resistance variable memory cells, wherein the resistance variable memory cells are coupled to one or more data lines, a row decoder connected to a first side of the array, a column decoder connected to a second side of the array, wherein the second side is adjacent to the first side, a gap located adjacent to the row decoder and the column decoder, and clamp circuitry configured to control a reverse bias voltage associated with one or more unselected memory cells during a programming operation, wherein the clamp circuitry is located in the gap and is selectively coupled to the one or more data lines.