Clamp Diode Breakdown Voltage Control via Segmented Diffusion

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Solution Overview

Problem

Conventional Zener diodes increase leakage current when attempting to reduce breakdown voltage, which is necessary as gate insulation film thickness decreases, due to increased impurity concentration in diffusion layers.

Innovation Solution

The semiconductor device incorporates a clamp diode with a P− type diffusion layer of reduced width and an N+ type buried diffusion layer of higher impurity concentration, utilizing punch-through to define breakdown voltage and suppress leakage current, while maintaining low impurity concentration in other layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If impurity concentration in diffusion layers is increased to reduce breakdown voltage, then breakdown voltage is reduced, but leakage current increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidleakage current
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

The clamp diode is divided into multiple diffusion layers with different impurity concentrations: a first diffusion layer with high impurity concentration to achieve low breakdown voltage, and a second diffusion layer with low impurity concentration to maintain low leakage current. This segmentation allows each layer to optimize for its specific function without compromise.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the clamp diode are assigned different impurity concentrations based on their functional requirements. The first diffusion layer (anode side) has high impurity concentration for voltage clamping, while the second diffusion layer (cathode side) has low impurity concentration for low leakage, creating local quality variations that resolve the contradiction.

Inventive Principle:
Principle #3Local quality

2Speed

If gate insulation film thickness is reduced to increase speed, then speed is improved, but withstand voltage decreases

Engineering Contradiction:
Improveoperating speedVSAvoidwithstand voltage
Core Design Contradiction:
SpeedVSStrength

Solution Approach 1:

The clamp diode's breakdown voltage parameter is adjusted to match the reduced withstand voltage of thinner gate insulation films. By controlling the impurity concentration in the first diffusion layer, the breakdown voltage is set appropriately for the specific gate insulation thickness, enabling high-speed operation while maintaining protection capability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for reduced breakdown voltage without increasing leakage current, making it suitable for protecting gate insulation films in MOS transistors with thinner gate insulation, thereby reducing power consumption and maintaining effective clamping characteristics.

Implementation Method 1

When a reverse bias voltage is increasingly applied between the cathode electrode 55 and the anode electrode 56, there is caused a breakdown in a PN junction formed of the N+ type diffusion layer 53 and the P+ type diffusion layer 52. The reverse bias voltage at the breakdown is called a Zener voltage.

Methodology Applied
Scientific EffectZener breakdown: Avalanche Breakdown

Implementation Method 2

An insulation film 54 is formed to cover the surface of the N− type semiconductor layer 51.

Methodology Applied
Scientific EffectDielectric insulation: Dielectric

Data Source

PatentUS8018001B2Semiconductor device
Publication Date: 2011.09.13 SEMICON COMPONENTS IND LLC
  • US8018001B2 patent drawing
  • US8018001B2 patent drawing
  • US8018001B2 patent drawing

AI summary

A breakdown voltage of a clamp diode can be reduced while a leakage current is suppressed. A P− type diffusion layer is formed in a surface of an N− type semiconductor layer. An N+ type diffusion layer is formed in a surface of the P− type diffusion layer. A P+ type diffusion layer is formed adjacent the N+ type diffusion layer in the surface of the P− type diffusion layer. An N+ type diffusion layer is formed adjacent the P− type diffusion layer in the surface of the N− type semiconductor layer. There is formed a cathode electrode, which is electrically connected with the N+ type diffusion layer through a contact hole formed in an insulation film on the N+ type diffusion layer. There is formed a wiring (an anode electrode) connecting between the P+ type diffusion layer and the N+ type diffusion layer through a contact hole formed in the insulation film on the P+ type diffusion layer and a contact hole formed in the insulation film on the N+ type diffusion layer.