Clamped Comparator Circuit for Faster Switching and Lower Kickback

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Solution Overview

Problem

Existing comparator circuits face delays in processing speed due to charging and discharging at output terminals and generate kickback noise, leading to slow flipping speeds and erroneous outputs.

Innovation Solution

Incorporating a clamping circuit that limits the highest voltage of the first-stage op amp circuit's output terminal to a preset voltage, reducing discharge delays and minimizing voltage changes, thereby enhancing flipping speed and reducing kickback noise interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the output terminal of the first-stage op amp circuit pulls down from high potential to ground potential, then the comparison result is obtained, but charging and discharging delay occurs at the output terminal

Engineering Contradiction:
Improvecomparison result accuracyVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The clamping circuit pre-charges the output terminal of the first-stage op amp circuit to a preset voltage before the comparison operation. This preliminary action reduces the voltage difference that needs to be discharged during comparison, thereby reducing the charging and discharging delay while maintaining accurate comparison results.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If the output terminal of the first-stage op amp circuit has large voltage change range, then the comparison range is sufficient, but the flip speed of the comparator becomes slow

Engineering Contradiction:
Improvevoltage comparison rangeVSAvoidflip speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The clamping circuit pre-establishes the output terminal voltage at a preset level close to the expected final voltage. This preliminary positioning reduces the actual voltage swing required during the comparison operation, enabling faster flipping while still covering the necessary comparison range through the two-stage op amp architecture.

Inventive Principle:
Principle #10Preliminary action

3Speed

If the output signal of the first-stage op amp circuit changes rapidly, then the comparison result is obtained quickly, but kick back noise is generated and coupled to the input voltage

Engineering Contradiction:
Improvecomparison speedVSAvoidkick back noise
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The clamping circuit pre-positions the output terminal voltage close to the target voltage, significantly reducing the magnitude of voltage change required during comparison. This reduces the amplitude of rapid transitions, thereby minimizing kick back noise coupling to the input while still achieving fast comparison results.

Inventive Principle:
Principle #10Preliminary action

4Ease of operation

If the output terminal voltage is allowed to swing freely, then the op amp circuit operates without constraint, but discharge delay increases and processing speed decreases

Engineering Contradiction:
Improveop amp circuit operationVSAvoiddischarge delay
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The clamping circuit applies a preliminary voltage constraint to the output terminal, pre-charging it to a preset voltage level. This constrained preliminary state reduces the subsequent discharge distance and time required during comparison operations, decreasing discharge delay while maintaining proper circuit operation throughout the process.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11683027B2Comparators
Publication Date: 2023.06.20 CHANGXIN MEMORY TECH INC
  • US11683027B2 patent drawing
  • US11683027B2 patent drawing
  • US11683027B2 patent drawing

AI summary

A comparator includes a first-stage op amp circuit, a second-stage op amp circuit, a bias circuit and a clamping circuit. The first-stage op amp circuit includes two voltage input terminals and a voltage output terminal; the second-stage op amp circuit is connected with the bias circuit and the voltage output terminal of the first-stage op amp circuit; and the clamping circuit is connected with the voltage output terminal of the first-stage op amp circuit. By adding a clamping circuit in the comparator, the highest voltage at the voltage output terminal of the first-stage op amp circuit can be clamped to a preset voltage. During the operation of the comparator, the voltage change range of the voltage output terminal of the first-stage op amp circuit is smaller, which reduces the discharge delay of the voltage output terminal of the first-stage op amp circuit, thereby increasing the flip speed of the comparator.