Class-AB Pseudo-Differential DAC With Code-Dependent DC Current
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Solution Overview
Problem
Conventional digital-to-analog converters (DACs) in wireless communication devices have constant DC current, which limits power efficiency and battery talk time due to their design, necessitating a reduction in DC current while maintaining output signal power.
Innovation Solution
A pseudo-differential class-AB digital-to-analog converter with code-dependent DC current is introduced, featuring an input stage that modifies the most significant bits and least significant bits, and an output stage that steers the average output current to a low value at the mid-point of coded values, allowing for reduced DC current without compromising signal power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional fully-differential DAC design is used, then output signal power is maintained, but DC current remains constant and high, reducing power efficiency
Solution Approach 1:
The patent applies dynamics by transitioning from a static constant current design to a dynamic code-dependent current design. The DAC output current is dynamically adjusted based on the input code value, allowing the current to vary between high and low states rather than remaining constant. This is achieved through class-AB operation mode and current steering mechanisms that adapt the current level to the signal requirements.
Solution Approach 2:
The patent changes the parameter of DC current from a fixed constant value to a variable value that depends on the input code. By implementing code-dependent DC current, the current parameter is modified based on the signal amplitude requirements, enabling lower average current consumption while maintaining adequate current levels when high output power is needed.
2Duration of action of moving object
If DC current is reduced to improve power efficiency, then battery talk time increases, but output signal power may be compromised
Solution Approach 1:
The patent employs periodic action through class-AB operation where the current is alternately high and low depending on the signal envelope. During active transmission periods, higher current is supplied to maintain output power, while during idle or low-signal periods, the current is reduced to zero or minimal levels. This periodic modulation of current consumption extends battery talk time while preserving signal power when needed.
Solution Approach 2:
The dynamic current adjustment ensures that output signal power is maintained only when necessary (during actual transmission), rather than continuously. The system adapts the current level to match the instantaneous signal requirements, reducing average power consumption and extending battery life without compromising peak output capability.
3Use of energy by moving object
If code-dependent DC current is implemented, then power consumption is reduced, but DAC circuit complexity increases
Solution Approach 1:
The patent segments the DAC current output into multiple steerable current sources or current mirrors that can be independently controlled. By dividing the total current into segments that can be selectively activated based on the input code, the circuit achieves code-dependent current control without requiring a complete redesign of the entire DAC architecture. This segmentation approach manages complexity while enabling power reduction.
Solution Approach 2:
The patent implements multi-functionality by designing the DAC to operate in multiple modes (class-A and class-AB) and to serve multiple purposes: maintaining linearity, enabling code-dependent current control, and extending to pseudo-differential configurations. The same basic DAC structure is made universal enough to support these different operational modes through control logic and switching mechanisms, reducing the need for separate circuits for each function.
Data Source
AI summary
A digital-to-analog converter, RF transmit channel and method, for converting a digital signal of N bits having a set M of most significant bits and a set L of least significant bits to an analog signal, are disclosed. The digital signal defines a set of coded values which are converted to analog values and modulated on to a RF signal. The digital-to-analog converter includes a plurality of switches and an output stage, for providing at least a first differential output signal and a second differential output signal. The output stage modifies currents received from the plurality of switches, such that the value of the average output current of the first and second differential outputs signals is steered to a relatively low current value at the mid-point of the coded values.