Class AB Amplifier Gate Balancing for Low Second Harmonic

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Solution Overview

Problem

High bandwidth amplifiers with high gain introduce stability issues and cause second harmonic distortion due to asymmetric currents during the positive and negative half-cycles in class AB output stages, particularly in ultrasound transducer signal amplification systems.

Innovation Solution

The implementation of a circuit with two differential input stages and a balancing capacitor, where both stages receive the same input signal and are coupled to a floating battery, balances the gate-to-source currents of high side and low side transistors in the output stage, reducing second harmonic distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a high bandwidth amplifier with high gain is used, then the amplifier can process ultrasound transducer signals effectively, but it introduces stability issues and second harmonic distortion due to asymmetric currents

Engineering Contradiction:
ImprovebandwidthVSAvoidsecond harmonic distortion
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent applies asymmetry by introducing a balancing capacitor specifically connected to one of the differential input stages. This capacitor creates an asymmetric compensation mechanism that counteracts the inherent asymmetry in the class AB output stage currents, thereby reducing second harmonic distortion while preserving the high bandwidth performance

Inventive Principle:
Principle #4Asymmetry

2Use of energy by moving object

If a class AB output stage is used, then power consumption is reduced during low signal conditions, but asymmetric currents during positive and negative half-cycles cause second harmonic distortion

Engineering Contradiction:
Improvepower consumptionVSAvoidsecond harmonic distortion
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent implements feedback through the balancing capacitor that senses the asymmetric current conditions in the class AB output stage and provides compensating signals to the differential input stages. This feedback mechanism dynamically adjusts the drive signals to counteract the current asymmetry, reducing second harmonic distortion while maintaining the power-efficient class AB operation

Inventive Principle:
Principle #23Feedback

3Object-generated harmful factors

If differential input stages are added to balance gate-to-source currents, then second harmonic distortion is reduced, but device complexity increases

Engineering Contradiction:
Improvesecond harmonic distortionVSAvoidcircuit complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent segments the amplifier into two separate differential input stages, each driving one of the class AB output transistors. This segmentation allows independent compensation of each transistor's gate-to-source current, enabling distortion reduction while maintaining modular circuit architecture that limits the increase in overall complexity

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240291451A1Low second harmonic single ended class ab amplifier
Publication Date: 2024.08.29 TEXAS INSTRUMENTS INC
  • US20240291451A1 patent drawing
  • US20240291451A1 patent drawing
  • US20240291451A1 patent drawing

AI summary

In an example, a circuit includes a high side output transistor having a control terminal coupled to a first capacitor, and includes a low side output transistor having a control terminal coupled to a second capacitor and a balancing capacitor. The circuit includes a first differential input stage configured to receive a differential input and provide a first output current to the control terminal of the high side output transistor. The circuit includes a second differential input stage configured to receive the differential input and provide a second output current to the control terminal of the low side output transistor. The circuit includes a floating battery coupled to the control terminal of the high side output transistor and the control terminal of the low side output transistor. The balancing capacitor balances a gate-to-source capacitance of the low side output transistor with a gate-to-source capacitance of the high side output transistor.