Class-D Amplifier Regulation for Noise and CMRR Control
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Solution Overview
Problem
Class-D amplifiers in computing devices suffer from noise issues due to high switching losses, current ripples, and common mode rejection ratio (CMRR) degradation caused by resistor mismatch, leading to audible degradations in audio output.
Innovation Solution
Implementing a class-D amplifier with dynamic regulation of DC input voltages to ensure a common mode voltage of 0 V at the integrator inputs, using variable resistors to draw common mode current toward ground, and dynamically adjusting resistor values to mitigate input noise without limiting gain, thereby reducing CMRR issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If resistor values are increased to reduce noise, then noise is reduced, but gain is limited
Solution Approach 1:
The patent applies dynamic resistor value adjustment based on input signal levels. The resistor values are not fixed but are dynamically controlled to optimize the balance between noise reduction and gain maintenance. This allows the system to adapt resistor values in real-time according to operating conditions, resolving the contradiction between reducing noise and maintaining gain.
Solution Approach 2:
The patent changes the resistance parameter dynamically based on input signal characteristics. By adjusting resistor values as a variable parameter rather than a fixed value, the system can optimize noise performance while preserving necessary gain levels, directly addressing the contradiction between these two requirements.
2Device complexity
If fixed resistor values are used, then circuit simplicity is maintained, but CMRR degrades due to mismatch
Solution Approach 1:
The patent transitions from fixed resistors to dynamically adjustable resistors that can adapt their values based on operating conditions. This dynamic adjustment compensates for mismatches that would otherwise degrade CMRR, while the adjustment mechanism is integrated in a way that maintains reasonable circuit simplicity.
Solution Approach 2:
The patent implements feedback control where resistor values are adjusted based on detected signal characteristics and mismatch conditions. This feedback mechanism continuously optimizes CMRR by compensating for resistor mismatches, resolving the contradiction between circuit simplicity and measurement precision.
3Object-affected harmful factors
If dynamic resistor adjustment is implemented, then noise is reduced and CMRR is improved, but device complexity increases
Solution Approach 1:
The patent implements a control mechanism that serves multiple functions: it adjusts resistor values for noise reduction, maintains CMRR performance, and adapts to different operating conditions. This multi-functional approach consolidates what could be separate complex circuits into a unified control system, reducing overall device complexity while achieving the desired noise reduction.
Solution Approach 2:
The patent uses parameter change as a unified approach to simultaneously address noise reduction and CMRR improvement. By controlling resistor values as the key parameter, the system achieves multiple performance improvements through a single control mechanism, thereby limiting the increase in device complexity.
Data Source
AI summary
Methods, apparatus, systems, and articles of manufacture are described to regulate an amplifier. An example apparatus includes an integrator, an input terminal of the integrator coupled to a terminal of a first resistor circuitry and an output terminal of the integrator coupled to a capacitor; an output stage, an input terminal of the output stage coupled to the output terminal of the integrator; second resistor circuitry, a first terminal of the second resistor circuitry coupled to the output terminal of the output stage, a second terminal of the second resistor circuitry coupled to the terminal of the first resistor circuitry and the input terminal of the integrator; and third resistor circuitry, a first terminal coupled to the terminal of the first resistor circuitry, the second terminal of the second resistor circuitry, and the input terminal of the integrator.