Class-D Amplifier DC Offset Minimization via Level-Shift

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Solution Overview

Problem

Class-D audio power amplifiers often exhibit a non-zero DC offset when initially powered on, leading to undesirable noises and potential damage to connected components like speakers, due to the inability of existing circuits to effectively manage DC offset at power-on.

Innovation Solution

An audio amplifier system comprising an input stage and an amplifier stage, where the input stage provides a level-shifted signal with a selected level shift value to minimize or eliminate DC offset in the amplified output signal, utilizing a microcontroller and DC offset determination modules to generate appropriate level shift correction signals during calibration and apply them at power-on.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If class-D power amplifier is initially powered on without DC offset correction, then the amplifier can start operation immediately, but a non-zero DC offset voltage level appears at the output causing pop or thump noise and potential speaker damage

Engineering Contradiction:

Improveamplifier startup speedVSAvoidDC offset voltage causing noise and speaker damage

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by determining and storing a level shift value during a calibration phase before the amplifier is initially powered on. This pre-determined correction value is then applied during startup to prevent DC offset from occurring in the first place, rather than correcting it after the harmful effect has already manifested. The calibration process measures the actual DC offset condition and stores compensating values that are automatically applied during subsequent power-on events.

Inventive Principle:

Principle #10Preliminary action

2Manufacturing precision

If weighted time average circuits are used to determine DC offset correction, then DC offset can be minimized after amplifier is powered on, but the circuits are ineffective when the amplifier is initially powered on

Engineering Contradiction:

ImproveDC offset correction accuracy during normal operationVSAvoidDC offset control during initial power-on

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The system performs preliminary calibration before normal operation to establish correction values that are stored and applied during startup. This separate preliminary measurement phase captures the DC offset characteristics before the amplifier begins operating, allowing the system to prepare correction values in advance that are specifically tailored to the amplifier's actual DC offset conditions, which weighted average circuits cannot determine during the critical initial power-on moment.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary calibration process that measures and stores DC offset characteristics separately from the main amplification operation. This intermediary calibration phase acts as a mediator that captures the DC offset conditions and translates them into stored correction values, which then serve as intermediaries during startup to prevent DC offset without requiring real-time measurement during the critical power-on event.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Object-affected harmful factors

If level shift correction is applied during calibration and stored for power-on use, then DC offset is minimized at startup, but additional circuit complexity is introduced

Engineering Contradiction:

ImproveDC offset at power-onVSAvoidcalibration circuitry and level shift implementation

Core Design Contradiction:

Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The system applies self-service by automatically performing the calibration process and storing the level shift values without requiring manual intervention. The amplifier self-determines its DC offset characteristics during calibration, self-stores the correction values in memory, and self-applies the correction during subsequent power-on events. This automated self-service approach reduces the need for complex manual adjustment mechanisms while achieving effective DC offset control.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS7378903B2System and method for minimizing DC offset in outputs of audio power amplifiers

Publication Date: 2008.05.27 SONOS INC

AI summary

An amplifier system receives an input signal and generating therefrom an amplified output signal. The amplifier system is recited as comprising an input stage and an amplifier stage. The input stage is configured to receive the input signal and provide a level-shifted signal that has an average signal level that is shifted in regards a level shift value. The amplifier stage is configured to receive the level-shifted input signal from the input stage and generate therefrom the amplified output signal. The level shift value being selected to minimize a DC offset in the amplified output signal at least when the amplifier system is initially powered on. Since the amplified output signal has a minimal or zero DC offset, the amplifier system avoids generation of undesirable noises when it is initially powered on.