Class D Amplifier Modulation for Low-Level Switching Loss Reduction
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Solution Overview
Problem
Class D amplifiers face inefficiencies and artefacts due to unnecessary high voltage switching and mismatched common mode voltages in their output stages, especially at low input signal levels, leading to increased capacitive losses and audible artefacts.
Innovation Solution
The implementation of a Class D amplifier circuitry with modulator and output stages that utilize dual carrier signals with overlapping amplitude ranges, along with compensation circuitry to adjust carrier signals and input signals, ensuring at least one signal level transition per signal period and minimizing distortion, thereby reducing power consumption and artefacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high voltage switching is used in the output stage, then power delivery capability is improved, but capacitive losses increase at low input signal levels
Solution Approach 1:
The patent applies dynamics by making the supply voltage to the output stage variable rather than fixed. The supply voltage is dynamically adjusted to match the instantaneous amplitude requirement of the input signal. When the input signal amplitude is low, the supply voltage is reduced accordingly, which directly reduces capacitive switching losses in the output stage while maintaining adequate power delivery capability when needed.
Solution Approach 2:
The patent changes the parameter of supply voltage from a constant high value to a variable value that tracks the input signal amplitude. This parameter change allows the system to optimize between power delivery capability and capacitive losses by adjusting the voltage level according to the actual signal requirements at any given moment.
2Measurement precision
If dual carrier signals with overlapping amplitude ranges are used, then signal representation accuracy is improved, but modulator circuitry complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the carrier signal generation into two separate carrier signals with different amplitude ranges. The first carrier signal covers a lower amplitude range while the second carrier signal covers a higher amplitude range, with their ranges overlapping. This segmentation allows for more accurate PWM modulation across the full signal range by selecting the appropriate carrier based on the input signal level, thereby improving signal representation accuracy.
Solution Approach 2:
The patent uses partial action by employing overlapping amplitude ranges between the two carrier signals. The overlap region allows for smooth transition and accurate representation between the two carrier domains. This partial redundancy in the overlapping region ensures continuous and accurate signal representation without requiring complex switching logic between carriers.
3Power
If multiple control signals are generated per signal period, then output voltage regulation is improved, but control circuitry complexity increases
Solution Approach 1:
The patent applies dynamics by generating multiple control signals within each signal period based on the instantaneous amplitude requirements. The system dynamically determines the number and levels of control signals needed to achieve the desired output voltage regulation. This dynamic approach allows for fine-grained control of the output stage switches, improving voltage regulation accuracy while adapting to different operating conditions.
Solution Approach 2:
The patent uses preliminary action by pre-calculating and generating the appropriate control signals for each signal period before the actual switching occurs. The modulator circuitry determines the required control signal levels and timing in advance, allowing the output stage to execute precise voltage regulation without requiring complex real-time decision-making during the switching operation.
Data Source
AI summary
Class D amplifier circuitry comprising: modulator circuitry; and output stage circuitry, wherein the modulator circuitry is configured to: receive an input signal and first and second carrier signals, wherein the second carrier signal is offset in amplitude with respect to the first carrier signal; generate first and second modulated output signals, each of the first and second modulated output signals being based on the input signal and the first and second carrier signals; and generate a plurality of control signals for the output stage circuitry per signal period of the modulated output signals, wherein the plurality of control signals are based on the first and second modulated output signals, and wherein at least one of the plurality of control signals per signal period comprises a signal level transition.