Class-D Amplifier Anti-Clipping Using Integrator Hold and Feedforward
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Solution Overview
Problem
Existing Class D amplifiers suffer from clipping issues when the input signal amplitude is too high, leading to noise and unpleasant popping sounds in the output signal.
Innovation Solution
The proposed Class D amplifier addresses clipping by operating the reset and/or hold states of the integration circuit and employing a feedforward architecture, which prevents clipping and maintains the output signal's quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the input signal amplitude is increased, then the output signal power is improved, but clipping occurs causing noise and popping sounds
Solution Approach 1:
The integrator circuits are reset to initial states before processing high-amplitude input signals. This preliminary action prevents the integrators from reaching saturation levels that would cause clipping, allowing the amplifier to handle high-power signals without generating distortion noise or popping sounds
Solution Approach 2:
The amplifier employs feedback signals that are combined with input signals in the integrator circuits. This feedback mechanism dynamically adjusts the integration process to prevent saturation, enabling the system to maintain linear operation even when processing high-amplitude signals that would otherwise cause clipping
2Productivity
If the integration circuit processes high-amplitude signals continuously, then the signal processing capability is improved, but the integrator circuits enter saturation causing clipping
Solution Approach 1:
The integrator circuits operate in periodic cycles, alternating between integration phases and reset phases. During normal operation, they integrate input signals to maintain signal processing capability. When saturation is detected or anticipated, they periodically reset to clear accumulated charge, preventing clipping while maintaining continuous signal processing capability
Solution Approach 2:
The integrator circuits dynamically switch between different operational states (integration mode and reset mode) based on signal conditions. This dynamic operation allows the system to adapt to varying input signal amplitudes, maintaining both high signal processing capability and signal quality by preventing saturation through timely state transitions
Data Source
AI summary
A class-D amplifier for generating an output signal having PWM according to an input signal based on a DC voltage during a normal mode (NM) includes: a first integrator for generating a first integrated signal by integrating the difference of the input signal and a feedback signal during the NM; a final-stage integrator for generating a final-stage integrated signal by integrating the first integrated signal during the NM; a superposition circuit for generating a loop filter signal by buffering the final-stage integrated signal during the NM; and a modulation and driving circuit for generating the output signal by comparing the loop filter signal and a triangle wave. During a clipping mode, the first integrator enters a reset or a hold state, and the final-stage integrator enters the hold state, and the superposition circuit is configured to superimposes the final-stage integrated signal and a feedforward signal to generate the loop filter signal.