Single-Ended Class-D PWM Amplifier Buffers for Lower Harmonic Distortion
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Solution Overview
Problem
Single-ended output class-D PWM amplifiers suffer from total harmonic distortion and power supply intermodulation distortion due to common-mode current flow, which degrades audio quality in personal audio devices.
Innovation Solution
The proposed solution involves a system with a first stage that processes differential pulse-width modulation input signals, a quantizer, a single-ended class-D output stage, a feedback network, and buffering and biasing subcircuits to minimize distortion. This includes input buffers with buffering and biasing subcircuits that equalize the impedance of pull-up and pull-down devices, reducing common-mode current and its harmonic effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single-ended output class-D amplifier is used to reduce area and component count, then device complexity is reduced, but total harmonic distortion and power supply intermodulation distortion increase due to common-mode current flow
Solution Approach 1:
The amplifier input stage is segmented into separate pull-up and pull-down buffer circuits that independently drive the PWM input nodes. This segmentation allows independent optimization of each buffer to minimize common-mode current while maintaining the single-ended structure's area efficiency.
Solution Approach 2:
The patent applies local quality by making the pull-up and pull-down buffers asymmetric in their design parameters. The buffers are locally optimized with different transistor sizes and biasing to achieve equal impedance presentation to the feedback network, thereby minimizing common-mode current at the specific location where it causes distortion.
2Ease of operation
If common-mode current flows through feedback paths in a single-ended amplifier, then the amplifier can operate with simpler single-ended topology, but differential components at twice the input frequency are generated causing harmonic distortion
Solution Approach 1:
The patent converts the potentially harmful common-mode current into a beneficial effect by designing the buffers to present equal impedance to the feedback network. This equal impedance causes the common-mode current to split equally and oppositely in the feedback paths, transforming it from a distortion-causing element into a neutral current that does not generate differential voltage components.
3Manufacturing precision
If buffer circuits are added to equalize impedance and reduce common-mode current, then distortion performance improves, but device complexity increases
Solution Approach 1:
The buffer circuits are designed with self-biasing capabilities using simple current mirrors and resistive dividers that automatically establish the required impedance equality without external adjustment or complex control circuitry. The buffers self-regulate to maintain optimal operating points, reducing the need for additional complexity in bias generation and impedance matching.
Data Source
AI summary
An amplifier system may include a first stage having a plurality of inputs configured to receive a differential pulse-width modulation input signal and generate an intermediate signal based on the differential pulse-width modulation input signal, a quantizer configured to generate a modulated signal based on the intermediate signal, a single-ended class-D output stage configured to generate a single-ended output signal as a function of the differential pulse-width modulation input signal, a feedback network configured to feed back the single-ended output signal to a first input of the plurality of inputs and to feed back a ground voltage to a second input of the plurality of inputs, a plurality of buffers, each particular buffer configured to receive a respective component of the differential pulse-width modulation input signal and generate a respective buffered component, and an input network coupled between the plurality of buffers and the first stage. Each particular buffer of the plurality of buffers may include a buffering subcircuit configured to buffer the respective component of the differential pulse-width modulation input signal associated with the particular buffer in order to generate the respective buffered component and a biasing subcircuit configured to limit a magnitude of the respective component of the differential pulse-width modulation input signal driven to circuitry of the buffering subcircuit for driving the respective buffered component.