Class-D Amplifier Feedback Loops for Low-Power Noise Shaping

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Solution Overview

Problem

Class D amplifiers in RF transceivers face challenges in minimizing noise and distortion due to limitations in time resolution, output voltage modulation by power supply, non-linear output impedance, and load-dependent frequency response, which affect the quality of audio signal reproduction.

Innovation Solution

The implementation of a multiple feedback architecture with two integrators, a triangle signal generator, comparator, and a feedback lowpass filter in the Class-D amplifier network, along with Dynamic Element Matching (DEM) and Natural Sampling Pulse Width Modulation (PWM), to create a negative feedback loop that suppresses non-idealities and attenuates quantization noise, ensuring improved noise reduction at low power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a simple integrator feedback loop is used in Class-D amplifier, then the device complexity is reduced, but the noise and distortion suppression capability deteriorates

Engineering Contradiction:
Improvefeedback loop structureVSAvoidnoise and distortion
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent implements a multiple-loop feedback architecture where the output signal is fed back through a feedback filter to multiple integrators. This multi-loop structure provides stronger noise and distortion suppression compared to simple single-loop feedback, while maintaining practical circuit complexity through systematic design of the feedback path.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces a feedback filter as an intermediary component in the feedback path. This filter shapes the feedback signal to optimize noise suppression in the audio band while allowing the multiple integrators to work effectively. The feedback filter acts as a mediator that conditions the feedback signal before it reaches the integrators.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If practical clock frequencies with limited time resolution are used, then the device complexity is reduced, but the quantization distortion increases

Engineering Contradiction:
Improveclock frequency systemVSAvoidquantization distortion
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent employs periodic action through the multiple integrators that process the feedback signal at each switching period. The integrators accumulate error signals over time, effectively distributing quantization errors across multiple periods and reducing their impact on any single output sample. This periodic integration process mitigates quantization distortion without requiring higher clock frequencies.

Inventive Principle:
Principle #19Periodic action

3Device complexity

If power supply voltage variations are allowed to directly modulate output voltage, then the device complexity is reduced, but the audio signal quality deteriorates

Engineering Contradiction:
Improvepower supply regulation systemVSAvoidoutput voltage modulation noise
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The multiple feedback loops continuously monitor the output voltage and compare it with the expected signal. When power supply variations cause output voltage deviations, the feedback mechanism detects these errors and generates corrective signals through the integrators, automatically compensating for power supply-induced noise without requiring complex external regulation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The amplifier system performs self-correction of power supply noise through its internal multiple integrator feedback structure. The integrators accumulate error signals caused by power supply variations and generate compensating control signals that automatically adjust the output to cancel out the noise, enabling the system to service its own power supply issues without external intervention.

Inventive Principle:
Principle #25Self-service

4Device complexity

If dead-time errors are not compensated, then the device complexity is reduced, but the output impedance non-linearity increases

Engineering Contradiction:
Improvedead-time compensation systemVSAvoidoutput impedance linearity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The feedback loops capture the actual output signal including dead-time effects and feed it back through the integrators. This allows the system to detect and compensate for dead-time induced non-linearities in real-time, maintaining output impedance linearity without requiring separate dead-time compensation circuitry or complex control logic.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8553909B2Low-power class D amplifier using multistate analog feedback loops
Publication Date: 2013.10.08 SMSC HLDG
  • US8553909B2 patent drawing
  • US8553909B2 patent drawing
  • US8553909B2 patent drawing

AI summary

An audio amplifier system may include an audio CODEC/output (AOP) path featuring analog class-D amplifiers, and using Natural Sampling Pulse Width Modulation (PWM) to convert an analog input into a series of Rail-to-Rail pulses. The audio signal may be encoded in the average value of the PWM pulse train and may be recovered from the PWM signal by analog low pass filtering. The Class-D amplifiers may be designed with a negative feedback loop/network to compare the output signal with the input signal and suppress non-idealities introduced by the Class-D switching stage. Furthermore, operation of the AOP may be designed according to a separate signal transfer function and a separate noise transfer function, and 2nd order noise shaping may be performed at low power, with an optimized filter included in the feedback loop to achieve the best noise reduction at low power. Operation of the amplifier feedback network may be similar to that of a continuous time, low-pass delta-sigma modulator, but with a PWM loop wrapped around the class-D power amplifier.