Class-D Power Amplifier Gate Driving to Suppress Reverse Recovery
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Solution Overview
Problem
Class-D power amplifiers experience significant electromagnetic interference (EMI) due to reverse recovery currents during transitions, especially when output current flows towards the amplifier, leading to rapid voltage changes and overshoots.
Innovation Solution
A driver circuit with multiple switches and control circuits is implemented for each power transistor, allowing for progressive charging and controlled switching to avoid reverse recovery by keeping the transistor ON until current polarity changes, using p-MOS and n-MOS transistors of varying sizes and control signals to manage the transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the gate of the lowside power MOSFET is charged rapidly during transition, then the switching speed is improved, but reverse recovery current occurs causing EMI and voltage overshoot
Solution Approach 1:
The driver circuit is divided into multiple independent driver stages (first driver stage, second driver stage, third driver stage) that charge the gate in sequence. Each stage has different drive strength, creating a progressive charging pattern that controls the MOSFET transition smoothly through different phases, avoiding the single-rapid-charging approach that causes reverse recovery
Solution Approach 2:
The first driver stage begins charging the gate early in the transition process before the MOSFET fully turns on. This preliminary action prepares the gate voltage gradually, ensuring that the MOSFET conducts smoothly and the output current transitions without causing reverse recovery in the body diode
2Speed
If the driver transistor size is increased to speed up transition, then the switching speed is improved, but the device complexity and risk of cross conduction increase
Solution Approach 1:
Instead of using one large driver transistor, the circuit segments the driving function across three driver stages with progressively smaller transistor sizes. This segmentation achieves fast switching through coordinated multi-stage driving while keeping individual transistors manageable in size, reducing complexity and cross-conduction risk
Solution Approach 2:
The driver circuit dynamically adjusts the effective drive strength at different phases of the transition. The first driver stage provides strong initial drive, the second stage maintains drive during the critical transition phase, and the third stage completes the charging. This dynamic, phase-dependent driving achieves high speed without requiring a single oversized transistor
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces EMI by controlling the transitions more gradually, avoiding rapid voltage changes and overshoots, resulting in smoother and faster transitions with reduced electromagnetic interference.
Implementation Method 1
the dimensions of these inverters together with the parasitic capacitances Cgdl and Cgdh of the power MOSFETs determine the dynamic behavior of the class-D output stage
Implementation Method 2
The output node Vout is switched between the supply lines using pulse-width modulation (PWM)
Implementation Method 3
An LC-low-pass filter is usually inserted between the output node Vout and the load, which may be a loudspeaker for filtering out the high frequency content of a signal delivered by the amplifier
Data Source
AI summary
A driver (Highside Driver, Lowside Driver) adapted to drive each of final transistors (MH, ML, Mpower) included in a power amplifier, the driver including: a first plurality of switches (Mpsiow, Mpmoderate, Mpfast) having their respective main current channels coupled between a bias voltage terminal (Vddx) and a control electrode of the respective final transistors (MH, ML, Mpower), said first plurality of switches (Mpsiow, Mpmoderate, Mpfast) being selectively turned ON for enabling a progressive charging of the respective control electrode of the final transistors (MH, ML, MPower), a second plurality of switches (Mnsiow, Mnfast) having their respective main current channels coupled between another bias voltage terminal (Vsource) and the control electrode of the respective final transistors (MH, ML, Mpower), said second plurality of switches (Mnsiow, Mnfast) being selectively switched ON until a current through the respective final transistors (MH, ML, Mpower) changes its polarity.