Class D Amplifier PWM Loop Stabilization With Counter Pulses

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Solution Overview

Problem

Class D amplifiers experience instability in their PWM control loops due to predictive pulse width modulation, leading to oscillations and inefficiencies.

Innovation Solution

A comparator within the PWM controller is used to cut off a generated PWM pulse and generate a counter pulse with opposite polarity, ensuring the net pulse energy matches the desired energy represented by the ADC value, stabilizing the PWM control loop.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If predictive pulse width modulation is used in class D amplifiers, then power efficiency is improved, but control loop stability deteriorates causing oscillations

Engineering Contradiction:
Improvepower efficiencyVSAvoidcontrol loop stability
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The invention applies preliminary anti-action by detecting when a PWM pulse exceeds the required energy level and actively counteracting it by generating a compensating pulse with opposite polarity. This prevents the accumulation of excess energy that would cause oscillations, while still allowing predictive PWM to operate for power efficiency.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The invention implements feedback by continuously monitoring the PWM pulse energy and comparing it with the required energy level. When a discrepancy is detected, the system adjusts subsequent pulses to compensate, ensuring control loop stability while maintaining the benefits of predictive PWM modulation.

Inventive Principle:
Principle #23Feedback

2Power

If predictive PWM generates excessive pulse energy, then power delivery is improved, but control precision deteriorates

Engineering Contradiction:
Improvepower deliveryVSAvoidcontrol precision
Core Design Contradiction:
PowerVSManufacturing precision

Solution Approach 1:

The invention changes the parameter of pulse polarity to compensate for excessive energy. By generating counter pulses with opposite polarity, the system adjusts the net energy delivery to match the precise requirements, maintaining both power delivery capability and control precision.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If PWM pulses are cut off to correct energy excess, then control accuracy is improved, but time delay increases

Engineering Contradiction:
Improvecontrol accuracyVSAvoidtime delay
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The invention performs preliminary action by generating the compensating counter pulse immediately when energy excess is detected, within the same control cycle. This minimizes the time delay while ensuring control accuracy, as the correction is applied proactively rather than waiting for the next cycle.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12567844B2Class D amplifier with stabilized PWM control loop
Publication Date: 2026.03.03 SKYWORKS SOLUTIONS INC
  • US12567844B2 patent drawing
  • US12567844B2 patent drawing
  • US12567844B2 patent drawing

AI summary

A class D amplifier including a pulse width modulation (PWM) control loop, an H-bridge driver, a PWM controller having a PWM pulse generator to generate PWM pulses supplied to the H-bridge driver in response to an ADC value output by an analog-to-digital converter of the PWM control loop, and a comparator. The comparator is configured to trigger a cutoff of a PWM pulse generated by the PWM pulse generator during a respective loop cycle of the PWM control loop and to trigger generation of at least one counter PWM pulse with an opposite polarity in the respective loop cycle such that a net pulse energy of the cutoff PWM pulse and of the at least one generated counter PWM pulse corresponds to a pulse energy representing the ADC value provided by the analog-to-digital converter of the PWM control loop during the respective loop cycle.