Differential Class-D PWM Amplifier for Lower EMI and Power Loss

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional Class-D amplifiers experience power loss and electromagnetic interference (EMI) due to continuous high-low level transitions and operation in a switching state even when the input signal is zero, making it difficult to control power consumption and EMI effectively.

Innovation Solution

A Class D amplifier design incorporating a PWM modulator with comparators, exclusive OR gates, AND gates, and an output stage that generates differential output signals based on input signals, reducing high-low level transitions and power consumption by only activating transitions when necessary, and using a chip and electronic apparatus to implement this solution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional class-D amplifiers operate in a differential mode with continuous switching state, then the amplifier can maintain output signal, but power loss increases and EMI becomes difficult to control

Engineering Contradiction:
Improveoutput signal maintenanceVSAvoidpower loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements periodic action by using pulse-width modulation (PWM) to switch the output stage on and off at high frequency, replacing continuous operation with periodic switching. The PWM signal modulates the duty cycle based on the input audio signal, allowing the amplifier to maintain output during active periods while entering low-power sleep periods, thereby reducing overall power consumption while maintaining signal integrity through high-frequency periodic reconstruction

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies dynamics by making the output stage dynamically controllable through the PWM modulator. The switching state of the output transistors is dynamically adjusted based on the instantaneous amplitude of the input signal, allowing the amplifier to adapt its power consumption and output level in real-time. This dynamic control enables the system to reduce power loss during low-signal conditions while maintaining full output capability when needed

Inventive Principle:
Principle #15Dynamics

2Power

If conventional class-D amplifiers maintain high-low level transitions on output signals, then the amplifier can drive the load, but electromagnetic interference increases

Engineering Contradiction:
Improveoutput drive capabilityVSAvoidelectromagnetic interference
Core Design Contradiction:
PowerVSObject-generated harmful factors

Solution Approach 1:

The patent uses periodic PWM switching to replace continuous high-low level transitions. By confining switching events to periodic intervals synchronized with the audio signal envelope, the amplifier reduces the overall frequency and duration of transitions that generate EMI. The periodic nature allows for predictable EMI spectra that can be more easily filtered while maintaining adequate drive capability during active periods

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent implements preliminary action through the PWM modulator, which pre-processes the audio signal into a modulated pulse train before reaching the output stage. This preliminary modulation ensures that the output stage only switches when necessary to reproduce the audio signal, avoiding unnecessary high-low level transitions that would generate EMI. The PWM signal prepares the switching events in advance, synchronizing them with the audio content to minimize spurious transitions

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240097627A1Class d amplifier and related chip and electronic apparatus
Publication Date: 2024.03.21 SHENZHEN GOODIX TECH CO LTD
  • US20240097627A1 patent drawing
  • US20240097627A1 patent drawing
  • US20240097627A1 patent drawing

AI summary

A class D amplifier is provided, including: a first comparator, configured to generate a first comparison result based on a positive end input signal and a triangular wave; a second comparator, configured to generate a second comparison result based on a negative end input signal and the triangular wave; an exclusive OR gate, configured to generate a first control signal based on the first comparison result and the second comparison result; a first AND gate, configured to generate a positive end PMW output based on the first comparison result and the first control signal; and a second AND gate, configured to generate a negative end PMW output based on the second comparison result and the first control signal; and an output stage, configured to generate the positive end output signal and the negative end output signal correspondingly based on the positive end PMW output and the negative end PMW output.