Cascaded Class D Amplifier Using PWM Error Correction for Linearity
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Solution Overview
Problem
Conventional Class D amplifiers suffer from limited linearity and require high precision analog components and control loops, which are difficult to design and implement effectively.
Innovation Solution
The improved Class D amplifier utilizes cascaded pulse width modulation stages that can be independently weighted, with much of the signal processing performed digitally to enhance linearity and accuracy, and error extraction and reduction in the digital domain through digital and analog gain scaling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional Class D amplifiers use switched power stage transistors to prevent the amplifier from entering the active region, then power efficiency is improved, but linearity deteriorates
Solution Approach 1:
The amplifier is divided into multiple cascaded stages, each performing a portion of the signal amplification. This segmentation allows the system to maintain high efficiency through switching operation while improving linearity by distributing the signal processing across multiple controlled stages
Solution Approach 2:
A digital error extraction and correction mechanism is introduced as an intermediary between the switching stage and the output. This intermediary captures quantization errors from PWM conversion and applies corrective feedback, thereby improving linearity without sacrificing the efficiency benefits of switching operation
2Manufacturing precision
If conventional Class D amplifiers use high precision analog components and analog control loops, then linearity is improved, but device complexity increases
Solution Approach 1:
The patent replaces complex analog control loops with a digital error extraction and correction system. By converting error signals to the digital domain for processing and then applying corrections, the system achieves high linearity while avoiding the complexity and precision requirements of high-end analog components
Solution Approach 2:
The error extraction mechanism creates a digital copy of the quantization errors introduced by PWM conversion. This copied error signal is then processed and used to generate correction signals, allowing the system to compensate for nonlinearities without requiring precision analog components
Data Source
AI summary
An amplifier includes a first stage, a second stage coupled to the first stage, and a summation circuit. The first stage is configured to receive an analog input signal, convert the analog input signal to a digital signal, and output an intermediate analog output signal in response to the digital signal. The second stage is configured to output a second analog intermediate output signal based on a scaled pulse width modulation quantization error of the first stage. The summation circuit is configured to combine the first and second analog intermediate output signals to generate an amplified output signal.