Class-D Amplifier Synchronization to Suppress Beat Noise and THD
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Solution Overview
Problem
Class-D power amplifiers using switching power sources experience beat noise due to frequency differences, leading to deteriorated sound quality and increased total harmonic distortion (THD) at high output levels, and existing solutions complicate the circuitry with PLL circuits and require stable clock signals.
Innovation Solution
A class-D power amplifier design that includes a switching power source section, a synchronization signal generation section using a bandpass filter to extract a clock signal at a frequency multiple of the switching frequency, and a class-D power amplifying section with a comparator and filter to maintain self-oscillation at a synchronized frequency, reducing circuit complexity and preventing THD and beat noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the switching frequency of the class-D amplifying circuit and the switching frequency of the switching power source are synchronized, then beat noise is reduced, but the circuit complexity increases due to the need for PLL circuits and stable clock signal generation
Solution Approach 1:
The patent extracts the clock signal directly from the switching power source output without requiring external PLL circuits. The synchronization clock signal is obtained by filtering the switching frequency component from the power source output, eliminating the need for separate clock generation circuits and reducing overall system complexity.
Solution Approach 2:
The switching power source itself serves as the clock signal source for the class-D amplifying circuit. By using the power source's own switching frequency as the reference clock, the system achieves self-synchronization without external control circuits, thereby reducing complexity while maintaining beat noise reduction.
2Adaptability or versatility
If a D flip flop is inserted into the loop circuit for synchronization, then the amplifier can operate out of synchronization with input clock signal, but the configuration becomes complicated and requires stable external clock signals
Solution Approach 1:
The patent removes the D flip flop and external clock signal requirements from the system. Instead of inserting synchronization components into the loop, the solution extracts the clock signal directly from the switching power source output, simplifying the circuit while maintaining synchronization capability.
Solution Approach 2:
The switching power source serves dual functions: providing power to the class-D amplifying circuit and generating the synchronization clock signal. This multi-functionality eliminates the need for separate clock generation circuits and external stable clock sources, reducing overall system complexity.
3Manufacturing precision
If the output level of the amplifier becomes greater, then the frequency of self excitation decreases and THD is reduced, but when using external clock synchronization, the amount of negative feedback decreases and THD becomes worse
Solution Approach 1:
The patent employs feedback control where the switching frequency of the power source is used to synchronize the class-D amplifying circuit. This feedback mechanism maintains consistent THD performance across different output levels by ensuring the amplifier operates at the optimal self-excitation frequency determined by the power source clock, preventing the THD deterioration that occurs with external clock synchronization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces beat noise and THD without increasing circuit scale, allowing the amplifier to operate synchronously with the clock signal at varying output levels, preventing audible noise and maintaining high-quality sound output.
Implementation Method 1
a synchronization signal generation section using a bandpass filter to extract a clock signal at a frequency multiple of the switching frequency
Implementation Method 2
a transformer section which inputs an output from the first switching section to a primary coil thereof and takes out a converted output from a secondary coil thereof
Implementation Method 3
a rectification section which rectifies the converted output taken out of the secondary coil of the transformer section
Implementation Method 4
a filter section which smoothes an output from the second switching section to form an output signal
Data Source
AI summary
A class-D power amplifier includes a switching power source section, a synchronization signal generation section and a class-D power amplifying section. The synchronization signal generation section takes out of the switching power source section a clock signal having a second frequency which is “n” times of a first frequency. The class-D power amplifying section includes a comparator which compares an input signal with a feedback signal, a second switching section which switches a power source fed from the synchronization signal generation section, a filter section which smoothes an output signal from the second switching section, and a combining section which combines a delayed output signal with a clock signal from the synchronization signal generation section to generate the feedback signal. The class-D power amplifying section is adjusted so as to cause self-oscillating operation at a frequency substantially identical with the second frequency, when a level of the output signal from the filter section is low.