Digital Class-D Ternary Modulation With Pulse Distortion Compensation

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Solution Overview

Problem

Ternary modulation in digital Class-D amplifiers suffers from significant non-linearity errors and harmonics distortion due to minimum pulse width issues, particularly at low input signal levels, caused by rising and falling time mismatches between output waveforms.

Innovation Solution

The method involves symmetrically enlarging pulses in one output waveform and adding compensating pulses of equal width on the other waveform, positioned at the center of the enlarged pulses to compensate for the enlargement, thereby reducing distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If ternary modulation is used in digital Class-D amplifiers, then power efficiency is improved, but output waveform distortion increases due to minimum pulse width issues and rising/falling time mismatches

Engineering Contradiction:
Improvepower efficiencyVSAvoidoutput waveform distortion
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing compensation values in lookup tables before the amplification process. The distortion compensation circuit uses these pre-computed values to correct rising/falling time mismatches and minimum pulse width issues, thereby reducing output waveform distortion while maintaining the power efficiency benefits of ternary modulation

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If pulse width is reduced to minimum levels, then power efficiency is improved, but non-linearity errors increase significantly at low input signal levels

Engineering Contradiction:
Improvepower efficiencyVSAvoidnon-linearity errors
Core Design Contradiction:
Loss of energyVSMeasurement precision

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the pulse width parameter based on the input signal level. The distortion compensation circuit modifies the pulse width parameter to maintain a minimum threshold, preventing excessive narrowing at low signal levels. This ensures that power efficiency is optimized without allowing pulse width to reduce to levels that cause significant non-linearity errors

Inventive Principle:
Principle #35Parameter changes

3Stability of the object's composition

If rising and falling times are made equal, then waveform symmetry is improved, but distortion compensation becomes more complex due to mismatch variations

Engineering Contradiction:
Improvewaveform symmetryVSAvoiddistortion compensation complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent applies copying by creating duplicate compensation paths for both rising and falling edges. The distortion compensation circuit uses separate lookup tables and compensation mechanisms for each edge type, allowing independent optimization and simplifying the overall design. This copying approach maintains waveform symmetry while managing complexity through modular, reusable compensation structures

Inventive Principle:
Principle #26Copying

Data Source

PatentEP2448114B1Method and apparatus for efficient and distortion compensated digital Class-D amplifier ternary modulation scheme
Publication Date: 2012.12.12 ST ERICSSON SA
  • EP2448114B1 patent drawingFigure 1a
  • EP2448114B1 patent drawingFigure 1b
  • EP2448114B1 patent drawingFigure 2

AI summary

The present disclosure generally relates to the field of digital Class-D amplifiers and more specifically to a technique for reducing output waveforms distortion of a digital class-D amplifier implementing a ternary modulation scheme. An apparatus embodiment comprises an enlarging component for enlarging at least one pulse of a first output waveform PWM_P_TERN' of the amplifier 50 by a first enlarging pulse, wherein the at least one pulse of the first output waveform PWM_P_TERN' is symmetrically enlarged by the first enlarging pulse with respect to the centre position of the at least one pulse; and a pulses generating component for generating at least one first compensating pulse comp_pulse_p and for adding the generated at least one first compensating pulse comp_pulse_p on a second output waveform PWM_N_TERN' of the amplifier 50, wherein the at least one first compensating pulse comp_pulse_p has substantially the same width P as the first enlarging pulse and is added on the second output waveform PWM_N_TERN' at a position which corresponds to the centre position of the at least one pulse of the first output waveform PWM_P_TERN'.