Class-F Power Amplifier Bias Circuit With Harmonic Termination
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Power amplifying circuits face challenges in reducing power consumption due to difficulties in controlling the waveforms of collector voltage and current, leading to increased dissipative power and decreased power-added efficiency (PAE) in class-F operation.
Innovation Solution
A power amplifying circuit configuration that includes a first transistor, a bias circuit, and a termination circuit, where the second-order harmonic of the amplified signal is short-circuited to ground voltage, and the emitter of the first transistor is connected to ground, with a bias circuit that supplies a bias current or voltage to the base of the first transistor, enhancing PAE by controlling harmonics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If class-F operation is implemented to achieve high efficiency, then power-added efficiency is improved, but waveform control difficulty increases leading to increased dissipative power
Solution Approach 1:
An emitter degeneration inductor is introduced as an intermediary element between the transistor emitter and ground. This inductor acts as a mediator that transforms the difficult waveform control problem into a more manageable form by providing reactance that shapes the collector voltage and current waveforms, enabling better class-F operation without requiring precise direct control of the waveforms themselves.
Solution Approach 2:
The invention changes the electrical parameters of the amplifier circuit by introducing the emitter degeneration inductor with specific inductance value. This parameter change modifies the impedance characteristics and waveform shapes at the transistor terminals, allowing the circuit to achieve ideal class-F operation conditions where even harmonics are short-circuited and odd harmonics are open-circuited, thereby reducing dissipative power while maintaining high efficiency.
2Loss of energy
If harmonics are controlled in class-F operation, then power consumption is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The emitter degeneration inductor enables the circuit to self-adjust and self-regulate the harmonic content of the waveforms. By providing the appropriate reactance, the inductor causes the transistor to naturally generate waveforms with reduced even-order harmonics and controlled odd-order harmonics, achieving the desired class-F operation without requiring external precision control mechanisms or complex tuning circuits.
Solution Approach 2:
The inductor serves as an intermediary that simplifies the harmonic control process. Instead of requiring precise control of multiple harmonic components separately, the single inductor element mediates the waveform generation process, automatically shaping the harmonics to achieve low power consumption with relaxed manufacturing precision requirements compared to traditional class-F designs.
3Use of energy by moving object
If dissipative power is reduced through waveform control, then power-added efficiency is enhanced, but device complexity increases
Solution Approach 1:
The invention combines the waveform control function and the biasing function into a single integrated structure. The emitter degeneration inductor serves multiple purposes simultaneously: it shapes the collector voltage and current waveforms to reduce dissipative power, provides DC bias current path, and sets the operating point of the transistor. This merging of functions achieves enhanced power-added efficiency without proportionally increasing device complexity.
Solution Approach 2:
The emitter degeneration inductor is designed to perform multiple functions within the power amplifier circuit. It simultaneously acts as a waveform shaping element for class-F operation, a biasing element for setting the transistor operating point, and an impedance transformation element. This multi-functionality reduces the need for separate components, thereby enhancing power-added efficiency while keeping the overall device complexity manageable.
Data Source
AI summary
A power amplifying circuit includes a bias circuit that supplies a bias current or a bias voltage to a base of a first transistor, and at least one termination circuit that short-circuits a second-order harmonic of an amplified signal output from a collector of the first transistor to a ground voltage. An emitter of the first transistor is connected to ground. The bias circuit includes a second transistor. A collector of the second transistor is connected to the base of the first transistor. An emitter of the second transistor is connected to the emitter of the first transistor. A base of the second transistor is supplied with a predetermined voltage.