Classifier Cache and Variable Length Decoder for Object Detection
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Solution Overview
Problem
Conventional object detection methods, such as the Viola-Jones method, face bandwidth limitations when fetching classifier parameters from external memory, hindering fast and efficient performance, especially in real-time video applications.
Innovation Solution
A processor architecture incorporating a classifier cache, variable length decoder circuits, and a core engine circuit to store and decompress classifier streams, allowing for internal memory-based object detection and parallel processing, thereby reducing reliance on external memory access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If classifier parameters are fetched from external memory, then the system can be implemented with conventional architecture, but the bandwidth limitation hinders fast and efficient object detection performance
Solution Approach 1:
The classifier parameters are segmented into two groups: frequently accessed parameters are stored in on-chip memory, while less frequently accessed parameters remain in external memory. This segmentation reduces the bandwidth required for fetching classifier parameters during object detection, thereby improving detection speed while maintaining conventional architecture implementation.
2Productivity
If classifier parameters are stored in on-chip memory, then object detection speed improves, but the memory size requirement increases
Solution Approach 1:
Classifier parameters are segmented into two categories based on access frequency: hot parameters (frequently accessed) are stored in on-chip memory, while cold parameters (less frequently accessed) are kept in external memory. This segmentation enables fast object detection by keeping critical parameters in fast memory without requiring the entire classifier parameter set to be stored on-chip, thus avoiding excessive memory size requirements.
3Volume of stationary object
If the classifier is compressed, then the memory storage requirement decreases, but decompression complexity increases
Solution Approach 1:
The compressed classifier is segmented into multiple groups corresponding to different object classes or detection scenarios. Each group can be independently decompressed and stored in on-chip memory when needed. This segmentation reduces the amount of data that needs to be decompressed at any given time, thereby reducing decompression complexity while still achieving memory storage reduction through compression.
Solution Approach 2:
The classifier compression and organization into groups is performed in advance during system initialization or training phase. This preliminary action prepares the classifier data in a format that minimizes decompression complexity during runtime, allowing fast decompression of only the necessary groups during object detection without requiring complex real-time compression algorithms.
Data Source
AI summary
An apparatus comprising a classifier cache, a plurality of variable length decoder circuits and a core engine circuit. The classifier cache may be configured to store one or more compressed classifier streams. The plurality of variable length decoder circuits may each be configured to generate one or more uncompressed classifier streams in response to a respective one of the compressed classifier streams received from the classifier cache. The core engine circuit may be configured to detect one or more objects in a video signal by checking a portion of the video signal using the uncompressed classifier streams.