Clearance Pad Via Accuracy Testing for Misalignment Detection
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Solution Overview
Problem
The challenge in modern semiconductor packaging is ensuring accurate alignment of via openings to avoid electrical shorts and delamination due to metal dendrite formation, which current imaging techniques struggle to detect effectively.
Innovation Solution
Implementing clearance pads with clearance openings and performing an electrical continuity test to detect via misalignment by checking for contact between test vias and clearance pads, providing a more comprehensive and reliable method to assess via accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If imaging techniques are used to detect via accuracy, then via alignment can be monitored, but detection reliability is insufficient to definitively detect via shift
Solution Approach 1:
The patent introduces clearance pads as an intermediary structure between the via openings and the contact pads. These clearance pads create a detectable electrical connection when vias are misaligned, serving as a mediator that translates subtle alignment errors into measurable electrical signals. This intermediary mechanism enables more reliable detection of via shift compared to direct imaging techniques.
Solution Approach 2:
The patent replaces optical/mechanical imaging detection with an electrical detection system. Instead of using imaging techniques to visually assess via alignment, the invention uses electrical continuity testing through clearance pads to detect via misalignment. This substitution of detection methodology provides definitive detection capability that overcomes the limitations of imaging techniques.
2Reliability
If via openings are formed with tight tolerance to prevent electrical shorts, then device reliability improves, but manufacturing complexity increases
Solution Approach 1:
The patent implements clearance pads in advance before final via formation and metal filling. This preliminary structure allows for detection and correction of via misalignment early in the manufacturing process, preventing the need for rework or scrap later. By performing the alignment check beforehand, the process manages tight tolerance requirements more effectively without exponentially increasing complexity.
Solution Approach 2:
The clearance pads serve as an intermediary detection layer that simplifies the quality control process. Rather than requiring extremely precise direct alignment between vias and contact pads, the clearance pads provide a buffer zone that makes misalignment detectable through electrical continuity testing, thereby managing the complexity of tight tolerance manufacturing.
3Reliability
If stress testing is performed to verify via accuracy, then device reliability can be confirmed, but testing time and cost increase
Solution Approach 1:
The patent performs via alignment verification through electrical continuity testing with clearance pads before conducting time-consuming stress tests. This preliminary detection method identifies via misalignment issues early, allowing defective devices to be flagged and removed from further testing. Consequently, stress testing time is reduced because only devices that pass the preliminary electrical continuity check need to undergo full stress testing.
Solution Approach 2:
The patent implements a two-stage verification approach where a simpler electrical continuity test with clearance pads is performed first on all devices. Only devices that pass this preliminary check proceed to full stress testing. This partial verification strategy reduces overall testing time while maintaining reliability assurance, as the clearance pad test catches the majority of via alignment defects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for definitive detection of via shift before stress testing, enhancing device reliability by preventing electrical shorts and delamination, and enabling quality assurance without the need for additional stress tests.
Implementation Method 1
performing an electrical continuity test to detect via misalignment by checking for contact between test vias and clearance pads
Data Source
AI summary
Methods and pad structures to test via accuracy are provided. A method according to the present disclosure includes forming a first pad and a second pad on a device component, wherein the second pad includes a via landing area and a clearance opening, providing a core substrate that includes a cavity, placing the device component in the cavity, forming a build-up film over the device component and the core substrate, forming a first contact via extending through the build-up film to contact the landing area and a second contact via extending through build-up film and the clearance opening, and performing a continuity test to determine whether the second contact via is in contact with the second pad.