Clip-Bonded Semiconductor Package Without Wirebonds

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Solution Overview

Problem

Conventional semiconductor packages rely on wirebonding methods like wedge bonding or ball bonding for interconnecting components, which can be inefficient and prone to damage, especially in high-power applications, where improved thermal and electrical performance is needed.

Innovation Solution

The semiconductor package design incorporates a clip structure with a conductive spacer and a redistribution layer (RDL) that uses silver sintering material for bonding, eliminating the need for wirebonds by providing direct electrical and thermal connections between die, spacers, and substrates, enhancing reliability and power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wirebonding methods (wedge bonding or ball bonding) are used for interconnecting components, then electrical connection is achieved, but the risk of damage to die increases and thermal efficiency deteriorates

Engineering Contradiction:
Improverisk of damage to dieVSAvoidthermal efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts and eliminates the wirebond from the interconnection system, replacing it with a direct bonding approach where the clip bonds directly to the die and substrate, removing the intermediate wirebond element that causes damage risk and thermal resistance

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical wirebonding process with a direct clipping and bonding mechanism, where the clip structure provides both mechanical support and electrical connection without requiring the force-intensive wirebonding process

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If wirebonding methods are used for interconnecting components, then electrical connection is established, but thermal efficiency deteriorates

Engineering Contradiction:
Improveelectrical connectionVSAvoidthermal efficiency
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent merges the electrical connection function and thermal conduction function into a single integrated clip structure that bonds directly to both the die and substrate, eliminating the thermal barrier introduced by wirebonds

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent removes the wirebond intermediate layer that acts as a thermal barrier, creating a direct thermal pathway from the die through the clip to the substrate, thereby improving heat dissipation

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If wirebonding methods are used, then interconnection is achieved, but the force required increases the risk of die damage

Engineering Contradiction:
Improveinterconnection processVSAvoiddamage to die
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent replaces the high-force wirebonding mechanical process with a low-force direct bonding process using the clip structure, which achieves secure electrical and mechanical connection without subjecting the die to damaging forces

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the risk of damage to the die, improves thermal and electrical efficiency, and enhances reliability by eliminating the force required for wirebonding, leading to better power management and performance in high-power applications.

Implementation Method 1

The clip may be coupled to the one or more die and the spacer through one of solder or an adhesive... applying sintering material over one of a first side of a plurality of die or a first side of a clip, applying sintering material to one of a first side of an electrically conductive spacer or the clip, pressure sintering the electrically conductive spacer and plurality of die to the clip through the sintering material

Methodology Applied
Scientific EffectSintering: Sintering

Data Source

PatentUS11830856B2Semiconductor package and related methods
Publication Date: 2023.11.28 SEMICON COMPONENTS IND LLC
  • US11830856B2 patent drawing
  • US11830856B2 patent drawing
  • US11830856B2 patent drawing

AI summary

Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.