Clip Interconnect Package Layout for Dual-Sided Semiconductor Cooling

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Solution Overview

Problem

Current semiconductor device packages face challenges in efficient heat dissipation on multiple surfaces, particularly when the contact surface of a signal lead is not coplanar with the semiconductor die, limiting the effectiveness of heat management and electrical coupling.

Innovation Solution

A semiconductor device package design incorporating a conductive paddle and a dual-thickness conductive clip, where the thicker portion is coupled with the semiconductor die and the thinner portion with the signal lead, allowing for dual-sided cooling and electrical coupling, even in non-coplanar configurations, using a molding compound to encapsulate these components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a traditional semiconductor device package is used with coplanar contact surfaces, then manufacturing is simpler, but heat dissipation efficiency on multiple surfaces is reduced

Engineering Contradiction:

Improveheat dissipation efficiencyVSAvoidpackage structure complexity

Core Design Contradiction:

TemperatureVSDevice complexity

Solution Approach 1:

The patent transitions from coplanar contact surfaces to non-coplanar contact surfaces, utilizing multiple dimensions and planes for heat dissipation. The first and second contact surfaces are positioned on different planes, enabling heat to be dissipated from multiple surfaces simultaneously, thereby improving heat dissipation efficiency while accepting increased structural complexity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Temperature

If non-coplanar contact surfaces are used for dual-sided cooling, then heat dissipation efficiency is improved, but electrical coupling between signal lead and semiconductor die becomes difficult

Engineering Contradiction:

Improveheat dissipation efficiencyVSAvoidelectrical coupling reliability

Core Design Contradiction:

TemperatureVSReliability

Solution Approach 1:

The patent introduces a conductive member as an intermediary element between the signal lead and the semiconductor die. This conductive member has a first contact surface on a first plane and a second contact surface on a second plane, enabling it to bridge the non-coplanar surfaces and establish reliable electrical coupling while allowing dual-sided cooling configuration.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Ease of manufacture

If coplanar contact surfaces are used, then electrical coupling is easier to achieve, but the ability to provide efficient heat dissipation on multiple surfaces is limited

Engineering Contradiction:

Improveelectrical coupling easeVSAvoidheat dissipation capability

Core Design Contradiction:

Ease of manufactureVSTemperature

Solution Approach 1:

The patent employs non-coplanar contact surfaces positioned on different planes, allowing the conductive member to establish electrical coupling between the signal lead and semiconductor die while simultaneously enabling heat dissipation from multiple surfaces. This dimensional approach resolves the limitation of coplanar configurations for multi-surface cooling.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables efficient dual-sided cooling and electrical access to the semiconductor die, enhancing the performance and reliability of power semiconductor devices by facilitating heat dissipation and maintaining electrical connectivity in configurations where traditional approaches fail.

Implementation Method 1

conductive paddle, a semiconductor die coupled with the conductive paddle and a conductive clip

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

a molding compound encapsulating the semiconductor die and at least partially encapsulating the conductive paddle and the conductive clip

Methodology Applied

Scientific EffectEncapsulation: Physical Containment

Data Source

PatentUS20240363471A1Semiconductor device package with clip interconnect and dual side cooling

Publication Date: 2024.10.31 SEMICON COMPONENTS IND LLC

AI summary

In a general aspect, a packaged semiconductor device apparatus a conductive paddle, a semiconductor die coupled with the conductive paddle and a conductive clip having a first portion with a first thickness and a second portion with a second thickness. The first thickness can be greater than the second thickness. The first portion can be coupled with the semiconductor die. The device can also include a molding compound encapsulating the semiconductor die and at least partially encapsulating the conductive paddle and the conductive clip. The device can further include a signal lead that is at least partially encapsulated in the molding compound, the second portion of the conductive clip being coupled with the signal lead.