Clipping Circuit for CMOS Image Sensor Voltage Reduction

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Solution Overview

Problem

The variation in threshold voltage among amplification transistors in pixels causes fluctuations in the reset level, necessitating a margin in the gate voltage of the clipping circuit and the dynamic range of the AD conversion circuit, hindering a reduction in the voltage of the AD conversion circuit.

Innovation Solution

A solid-state imaging device with a clipping circuit that includes a transistor to generate a predetermined voltage and a sample holding circuit to hold and input the reset level, allowing for voltage limitation of the vertical signal line, using capacitors and a voltage generation circuit to apply different voltages during reset and signal level readings, and a selector to control the voltage limitation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the gate voltage of the clipping circuit is set to include a margin to account for reset level fluctuations, then the reliability of sunspot correction is improved, but the voltage requirement of the AD conversion circuit increases

Engineering Contradiction:
Improvesunspot correction reliabilityVSAvoidAD conversion circuit voltage
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the clipping circuit's gate voltage adaptive rather than fixed. The gate voltage is dynamically adjusted based on the actual reset level detected from each pixel, allowing the system to respond to variations in threshold voltage without requiring a predetermined margin. This dynamic adjustment eliminates the need to over-design the AD conversion circuit voltage headroom.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback by using the detected reset level to control the gate voltage of the clipping circuit transistor. The reset level detection circuit measures the actual reset level, and this information is fed back to adjust the clipping threshold. This closed-loop feedback mechanism ensures reliable sunspot correction while optimizing the voltage requirements of subsequent circuit stages.

Inventive Principle:
Principle #23Feedback

2Device complexity

If a fixed gate voltage is used in the clipping circuit to simplify design, then the device complexity is reduced, but the ability to handle reset level variations deteriorates

Engineering Contradiction:
Improveclipping circuit designVSAvoidreset level stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary action by detecting and measuring the reset level before using it to set the clipping threshold. The reset level detection circuit performs this measurement in advance, allowing the gate voltage to be pre-adjusted to the appropriate level. This preliminary detection enables the system to handle reset level variations without requiring complex real-time adjustment mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter of gate voltage from a fixed value to a variable value that depends on the detected reset level. By making the gate voltage a function of the reset level, the circuit can adapt to different threshold voltage conditions while maintaining a relatively simple overall structure. This parameter change allows the same hardware to handle varying conditions effectively.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10171761B2Solid-state imaging device and electronic device
Publication Date: 2019.01.01 SONY GROUP CORP
  • US10171761B2 patent drawing
  • US10171761B2 patent drawing
  • US10171761B2 patent drawing

AI summary

The present technology relates to a solid-state imaging device and an electronic device that enable a reduction in the voltage of an AD conversion circuit. A solid-state imaging device includes: a plurality of pixels; a vertical signal line configured to output a pixel signal of the pixel; and a clipping circuit configured to limit a voltage of the vertical signal line to a predetermined voltage. The clipping circuit includes a transistor configured to generate the predetermined voltage in accordance with a voltage of a gate, and a sample holding circuit configured to hold a reset level of the pixel that is output to the vertical signal line, and input the reset level to the gate of the transistor. The present technology can be applied to a CMOS image sensor, for example.